3 * NOTE: this needs to align with src/mainboard/google/reef/chromeos.fmd
4 * in the coreboot repository. Any changes made there should be reflected
5 * in this file. There are parallel notions of fmap information. However,
6 * both are used in different parts of the system so the right answer now
7 * is to keep them in sync.
11 model = "Google Reef";
13 hwid = "REEF TEST 3240";
16 /* Enable factory-friendly features. */
17 gbb-flag-dev-screen-short-delay;
18 gbb-flag-force-dev-switch-on;
19 gbb-flag-force-dev-boot-usb;
20 gbb-flag-disable-fw-rollback-check;
25 compatible = "chromeos,flashmap";
26 /* FIXME: the part is really 16MiB */
27 reg = <0xff800000 0x00800000>;
30 * This encompasses both the descriptor proper and IFWI
31 * information found in the first part of the BIOS section.
35 reg = <0x00000000 0x00200000>;
40 * Firmware Descriptor section of the Intel Firmware Descriptor
45 reg = <0x00000000 0x00001000>;
49 reg = <0x0007c480 0x00008000>;
53 reg = <0x00200000 0x00004000>;
59 * We encourage to align FMAP partition in as large
60 * block as possible so that flashrom can find it soon.
61 * For example, aligning to 512KB is better than to
65 reg = <0x00204000 0x00000800>;
73 reg = <0x00204800 0x00000040>;
78 reg = <0x00205000 0x0017b000>;
80 type = "blob coreboot";
85 /* GBB offset must be aligned to 4K bytes */
86 reg = <0x00380000 0x00040000>;
92 reg = <0x003c0000 0x00010000>;
96 /* ---- Section: Rewritable MRC cache 64KB ---- */
98 label = "rw-mrc-cache";
99 /* Alignment: 4k (for updating) */
100 reg = <0x00400000 0x00010000>;
104 /* ---- 16k of event log ---- */
107 /* Alignment: 4k (for updating) */
108 reg = <0x00410000 0x00004000>;
112 /* --- Section: Rewritable shared 16 KB --- */
115 * Alignment: 4k (for updating).
116 * Anything in this range may be updated in recovery.
119 reg = <0x00414000 0x00004000>;
122 label = "shared-data";
124 * Alignment: 4k (for random read/write).
125 * RW firmware can put calibration data here.
127 reg = <0x00414000 0x00002000>;
132 label = "vblock-dev";
134 * Alignment: 4k (for random read/write).
135 * Reserve space for an optional user-installed
136 * vblock to validate dev-mode kernels.
137 * See crosbug.com/p/11216.
139 reg = <0x00416000 0x00002000>;
143 /* ---- Section: Rewritable VPD 8 KB ---- */
146 /* Alignment: 4k (for updating) */
147 reg = <0x00418000 0x00002000>;
151 /* ---- Section: Rewritable slot A ---- */
153 label = "rw-section-a";
154 /* Alignment: 4k (for updating) */
155 reg = <0x0041a000 0x00173000>;
160 * Alignment: 4k (for updating) and must be in start of
163 reg = <0x0041a000 0x00010000>;
164 type = "keyblock cbfs/rw/a-boot";
165 keyblock = "firmware.keyblock";
166 signprivate = "firmware_data_key.vbprivk";
168 kernelkey = "kernel_subkey.vbpubk";
169 preamble-flags = <0>;
172 /* Alignment: no requirement (yet). */
174 reg = <0x0042a000 0x00162fc0>;
175 type = "blob cbfs/rw/a-boot";
178 /* Alignment: no requirement. */
180 reg = <0x0058cfc0 0x00000040>;
182 type = "blobstring fwid";
185 /* ---- Section: Rewritable slot B ---- */
187 label = "rw-section-b";
188 /* Alignment: 4k (for updating) */
189 reg = <0x0058d000 0x00173000>;
194 * Alignment: 4k (for updating) and must be in start of
197 reg = <0x0058d000 0x00010000>;
198 type = "keyblock cbfs/rw/b-boot";
199 keyblock = "firmware.keyblock";
200 signprivate = "firmware_data_key.vbprivk";
202 kernelkey = "kernel_subkey.vbpubk";
203 preamble-flags = <0>;
207 /* Alignment: no requirement (yet). */
208 reg = <0x0059d000 0x00162fc0>;
209 type = "blob cbfs/rw/b-boot";
213 /* Alignment: no requirement. */
214 reg = <0x006fffc0 0x00000040>;
216 type = "blobstring fwid";
221 label = "device-extension";
222 reg = <0x0077f000 0x00080000>;