reef: increase BIOS region size
authorAaron Durbin <adurbin@chromium.org>
Thu, 26 May 2016 17:19:46 +0000 (12:19 -0500)
committerchrome-bot <chrome-bot@chromium.org>
Sat, 28 May 2016 01:08:56 +0000 (18:08 -0700)
The new descriptors utilize a 512KiB device expansion region for the
CSE's use. This allows the BIOS region to increase as the expansion
region decreased. Adjust the fmap as well as the macro marking the
end of the BIOS region. The CSE_SIGN region needed to be moved to
reflect the new location of the logical boot partition 2 since
the BIOS region increased. The GBB also had to be decreased to
accommodate the new LBP2 location.

BUG=chrome-os-partner:53689
BRANCH=None
TEST=None

Change-Id: Ib40335b9c0adfa824cec30768a87e12007735e59
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/347482
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
board/reef/fmap.dts
src/board/reef/board.c

index 19d3380..ee1018f 100644 (file)
                        type = "blob coreboot";
                        required;
                };
-               ro-sig2 {
-                       label = "sign_cse";
-                       reg = <0x00380000 0x00010000>;
-                       read-only;
-                       required;
-               };
                ro-gbb {
                        label = "gbb";
                        /* GBB offset must be aligned to 4K bytes */
-                       reg = <0x00390000 0x00070000>;
+                       reg = <0x00380000 0x00040000>;
                        read-only;
                        type = "blob gbb";
                };
+               ro-sig2 {
+                       label = "sign_cse";
+                       reg = <0x003c0000 0x00010000>;
+                       read-only;
+                       required;
+               };
                /* ---- Section: Rewritable MRC cache 64KB ---- */
                rw-mrc-cache {
                        label = "rw-mrc-cache";
                device-extension {
                        /* CSE RW data */
                        label = "device-extension";
-                       reg = <0x00700000 0x00100000>;
+                       reg = <0x0077f000 0x00080000>;
                        type = "wiped";
                        wipe-value = [ff];
                };
index abb66f8..1a08279 100644 (file)
@@ -51,7 +51,7 @@
  * used for FLASH_MEM_MAP_SIZE.
  *
  */
-#define FLASH_MEM_MAP_SIZE 0x6FF000
+#define FLASH_MEM_MAP_SIZE 0x77f000
 #define FLASH_MEM_MAP_BASE ((uintptr_t)(0x100000000ULL - FLASH_MEM_MAP_SIZE))
 
 static int board_setup(void)