gru: enable keyboard
authorVadim Bendebury <vbendeb@chromium.org>
Thu, 19 May 2016 16:03:38 +0000 (09:03 -0700)
committerchrome-bot <chrome-bot@chromium.org>
Tue, 24 May 2016 17:18:59 +0000 (10:18 -0700)
This patch configures and enables SPI EC based keyboard on Gru.

BRANCH=none
BUG=chrome-os-partner:51537
TEST=pressing ^U at the right time allows to boot Chrome OS from the
     SD card.

Change-Id: I802a9bd0620949b3e924026305faf3cb175f6582
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/346640
Reviewed-by: Julius Werner <jwerner@chromium.org>
board/gru/defconfig
src/board/gru/board.c

index c0c48a5..b26399a 100644 (file)
@@ -24,8 +24,9 @@ CONFIG_KERNEL_FIT=y
 CONFIG_KERNEL_FIT_FDT_ADDR=0x6400000
 
 # Drivers
-#CONFIG_DRIVER_EC_CROS=y
-#CONFIG_DRIVER_EC_CROS_SPI=y
+CONFIG_DRIVER_EC_CROS=y
+CONFIG_DRIVER_EC_CROS_SPI=y
+CONFIG_DRIVER_EC_CROS_SPI_WAKEUP_DELAY_US=100
 
 CONFIG_DRIVER_STORAGE_MMC=y
 CONFIG_DRIVER_STORAGE_DWMMC_RK3399=y
@@ -33,7 +34,7 @@ CONFIG_DRIVER_SDHCI=y
 CONFIG_DRIVER_FLASH_SPI=y
 CONFIG_DRIVER_BUS_SPI_ROCKCHIP=y
 CONFIG_DRIVER_GPIO_RK3399=y
-#CONFIG_DRIVER_INPUT_MKBP=y
-#CONFIG_DRIVER_INPUT_MKBP_KEYMATRIX_STANDARD=y
+CONFIG_DRIVER_INPUT_MKBP=y
+CONFIG_DRIVER_INPUT_MKBP_KEYMATRIX_STANDARD=y
 CONFIG_DRIVER_INPUT_USB=y
 #CONFIG_DRIVER_TPM_SLB9635_I2C=y
index 9e68151..680048d 100644 (file)
 #include "base/init_funcs.h"
 #include "boot/fit.h"
 #include "config.h"
+#include "drivers/bus/spi/rockchip.h"
+#include "drivers/ec/cros/spi.h"
+#include "drivers/flash/spi.h"
 #include "drivers/flash/spi.h"
 #include "drivers/gpio/rockchip.h"
 #include "drivers/gpio/sysinfo.h"
-#include "vboot/util/flag.h"
-#include "drivers/storage/sdhci.h"
 #include "drivers/storage/dw_mmc.h"
 #include "drivers/storage/rk_dwmmc.h"
-#include "drivers/flash/spi.h"
-#include "drivers/bus/spi/rockchip.h"
+#include "drivers/storage/sdhci.h"
+#include "vboot/util/flag.h"
 
 static const int emmc_sd_clock_min = 400 * 1000;
 static const int emmc_clock_max = 200 * 1000 * 1000;
@@ -46,6 +47,15 @@ static int board_setup(void)
 
        flash_set_ops(&new_spi_flash(&spi1->ops)->ops);
 
+       // EC on Gru is connected to SPI bus #5
+       RkSpi *spi5 = new_rockchip_spi(0xff200000);
+       CrosEcSpiBus *cros_ec_spi_bus = new_cros_ec_spi_bus(&spi5->ops);
+       GpioOps *ec_int = sysinfo_lookup_gpio("EC interrupt", 1,
+                                             new_rk_gpio_input_from_coreboot);
+       CrosEc *cros_ec = new_cros_ec(&cros_ec_spi_bus->ops, 0, ec_int);
+       register_vboot_ec(&cros_ec->vboot, 0);
+
+
        SdhciHost *emmc = new_mem_sdhci_host((void *)0xfe330000,
                                             SDHCI_PLATFORM_NO_EMMC_HS200 |
                                             SDHCI_PLATFORM_NO_CLK_BASE,