depthcharge.git
4 years agoreef: Enable EC SW sync master
Furquan Shaikh [Tue, 2 Aug 2016 20:46:09 +0000 (13:46 -0700)]
reef: Enable EC SW sync

BUG=chrome-os-partner:54245
BRANCH=None
TEST=EC SW sync works fine

Change-Id: I37c9895d9924126c4b283bf43b55303ab7b2fe37
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/365480
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoramoops: Move all boards to lib_sysinfo ramoops
Julius Werner [Thu, 11 Aug 2016 00:33:43 +0000 (17:33 -0700)]
ramoops: Move all boards to lib_sysinfo ramoops

Now that coreboot allocates a ramoops area in CBMEM for all boards, we
can remove the individual hardcoded ramoops allocations from individual
boards. Also remove the ramoops_common_set_buffer() function which is no
longer needed now, and fix the check for the lib_sysinfo ramoops address
(0 is a valid memory address on some of our boards, even though you
couldn't really find CBMEM there... but it's generally cleaner to only
use size != 0 to test for existence of a range).

CQ-DEPEND=CL:368010
BRANCH=None
BUG=None
TEST=Booted Kevin and Jerry, confirmed that CBMEM ramoops address
appeared correctly in /proc/device-tree and that console-ramoops was
preserved across a crash.

Change-Id: I22d9080ba7406edf47479abbffcc76acb4a8f0de
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/367905
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agousb_eth: Remove invalid free of GenericUsbDevice.dev_data
Julius Werner [Sat, 6 Aug 2016 03:25:42 +0000 (20:25 -0700)]
usb_eth: Remove invalid free of GenericUsbDevice.dev_data

The USB ethernet driver framework currently frees a pointer on USB
unplug/shutdown that had never been initialized. This might have stemmed
from confusion between the NetDevice and GenericUsbDevice objects...
both provide a dev_data member pointer for use by specific driver
instantiations, but the latter's is not actually used by this driver.
(The former's is just used as a back-pointer to the GenericUsbDevice,
which already gets freed by the generic USB stack and doesn't need to be
freed by the driver.)

BRANCH=None
BUG=None
TEST=With improved memory allocator error messages, I no longer see an
out-of-heap free(0x840) on Kevin.

Change-Id: I30adc14659f9cec7c342df760ebef83ff422f9ae
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/366859
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoramoops: Disable ramoops_common_set_buffer() for ARM64
Julius Werner [Sat, 6 Aug 2016 03:15:52 +0000 (20:15 -0700)]
ramoops: Disable ramoops_common_set_buffer() for ARM64

The ramoops_common_set_buffer() function tries to automatically allocate
a ramoops region near the top of memory. A nice idea in theory, but
problematic in practice on ARM64 since libpayload also likes to allocate
certain memory ranges there, and does so without adding them to the
coreboot table or providing another good way to externally query them.
Due to this, the ramoops buffer can accidentally overlap the DMA heap or
the framebuffer on ARM64 devices that use this function.

The real solution would probably be to provide a better,
arch-independent memory range allocator in libpayload that can be called
and queried by payloads. But until then, this patch prevents the issue
from happening and switches the one ARM64 board that used this back to
the good old static ramoops allocator function.

BRANCH=None
BUG=None
TEST=None

Change-Id: I80d1abc6f13bec48971e64d8d3933aa1f56f653c
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/366858
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agovboot: Hide language selection bar during EC software sync
Daisuke Nojiri [Tue, 9 Aug 2016 20:52:09 +0000 (13:52 -0700)]
vboot: Hide language selection bar during EC software sync

Language selection is not possible during EC software sync because keyboard
is disabled. This change hides the language selection bar from the screen
displayed while EC software sync is taking place.

BUG=chrome-os-partner:56037
BRANCH=none
TEST=Verified on Jerry with hacked vboot_reference (VBSD_EC_SLOW_UPDATE=1)

Change-Id: I4db74a268f41c12a88b4f8c85832ec60217a0bf3
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/367312
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoAdd GPIO interface for Apollolake
John Zhao [Thu, 30 Jun 2016 17:19:57 +0000 (10:19 -0700)]
Add GPIO interface for Apollolake

Implement gpio interface in depthcharge

BUG=chrome-os-partner:54742
BRANCH=None
TEST=Built image and validated gpio configuration
Change-Id: I369080c7218aeb156d5980135b5cc9619074e8ea
Signed-off-by: John Zhao <john.zhao@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/357871
Commit-Ready: Freddy Paul <freddy.paul@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoAmenia: Change flash image size to 16MB
Bora Guvendik [Fri, 5 Aug 2016 23:13:13 +0000 (16:13 -0700)]
Amenia: Change flash image size to 16MB

Update fmap.dts file for 16MB flash image size
Change fmap.dts based on flash layout changes in chromeos.fmd
Increase BIOS region size

BUG=chrome-os-partner:51844
TEST=Boot to chrome

Change-Id: I085f5eaaafe6c84954c9e86df631204b4e5dc86f
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/366831
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoGale driver: Reduce the delay in I2C.
Kan Yan [Thu, 30 Jun 2016 21:20:25 +0000 (14:20 -0700)]
Gale driver: Reduce the delay in I2C.

BUG=b:28942403
TEST=Boot up and TPM functions normally.
BRANCH=None

3ms delay is sufficient for qup_i2c_write_fifo_flush().

Change-Id: Ib9ad9b4eb3cf10027526419cb282f4530bc3599e
Signed-off-by: Kan Yan <kyan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/357962
Reviewed-by: Suresh Rajashekara <sureshraj@chromium.org>
4 years agoGale Board: Only set mac addr for EVT3 board and above
Kan Yan [Wed, 3 Aug 2016 17:58:55 +0000 (10:58 -0700)]
Gale Board: Only set mac addr for EVT3 board and above

Exclude EVT1 variant with board ID 6.

BUG=chrome-os-partner:55320
TEST=None
BRANCH=None

Change-Id: Icfc1fb634ca0f90cc98eede7acff2835c83f7e3f
Signed-off-by: Kan Yan <kyan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/365890
Reviewed-by: Julio Diez <jdiez@chromium.org>
4 years agoGale Board: More board ID variant
Kan Yan [Fri, 29 Jul 2016 20:29:31 +0000 (13:29 -0700)]
Gale Board: More board ID variant

EVT1 has two board IDs.

BUG=chrome-os-partner:55320
TEST=None
BRANCH=None

Change-Id: I096f8e13a687d1e9349ade79af8610c8209a361e
Signed-off-by: Kan Yan <kyan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/364730
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Suresh Rajashekara <sureshraj@chromium.org>
4 years agoGale Board: Populate mac address to device tree.
Kan Yan [Thu, 21 Jul 2016 18:45:08 +0000 (11:45 -0700)]
Gale Board: Populate mac address to device tree.

Ethernet mac address need be read from VPD and pass to device tree for
EVT3 board.

BUG=chrome-os-partner:55435
TEST=None
BRANCH=None

Change-Id: I2bbeb454900506395fb35cbca577d7eee6d823b0
Signed-off-by: Kan Yan <kyan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/362677
Tested-by: Daniel Hung-yu Wu <hywu@google.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agokevin: Add code to support I2C TPM, move older config to kevin-tpm2
Julius Werner [Thu, 28 Jul 2016 21:04:29 +0000 (14:04 -0700)]
kevin: Add code to support I2C TPM, move older config to kevin-tpm2

Coming Kevin revisions will switch back to an I2C TPM. This patch adds
the required configuration options and code to support that. Since the
TPM type can currently only be changed at compile time, we can no longer
support older Kevins with the same image. In order to build for Kevin
revisions < 5, build the kevin-tpm2 board instead.

BRANCH=None
BUG=chrome-os-partner:55523
TEST=Compiled both Kevin and Gru, confirmed that output binary had the
appropriate code differences.

Change-Id: I2deb331b65b6d9ed009e7e673bdb21938fa6510f
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/364171
Reviewed-by: Douglas Anderson <dianders@chromium.org>
4 years agoreef: Add RO_SECTION and WP_RO to fmap.dts
Furquan Shaikh [Thu, 28 Jul 2016 21:44:25 +0000 (14:44 -0700)]
reef: Add RO_SECTION and WP_RO to fmap.dts

BUG=chrome-os-partner:55713
BRANCH=None
TEST=Compiles successfully

Change-Id: Ib6b2c4ae670cad4ed9775df4de199ce0a0752024
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/364261
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Saurabh Satija <saurabh.satija@intel.com>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Reviewed-by: Saurabh Satija <saurabh.satija@intel.com>
4 years agoGale Board: Change Board ID definition.
Kan Yan [Thu, 21 Jul 2016 17:59:28 +0000 (10:59 -0700)]
Gale Board: Change Board ID definition.

Change board ID for EVT3 to 5.

BUG=chrome-os-partner:55320
TEST=None
BRANCH=None

Change-Id: I1af67f23c90e48c7b177d868e71bb7a66e4c0dfd
Signed-off-by: Kan Yan <kyan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/362158
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agocros_ec: Select keyboard scanning method based on proper Kconfig option
Paul Kocialkowski [Wed, 20 Jul 2016 13:12:14 +0000 (15:12 +0200)]
cros_ec: Select keyboard scanning method based on proper Kconfig option

Commit f88af26b44fc8941a59b45dfb36f8fe4225e07d0 (cros_ec: Change
keyboard scanning method.) introduced the DRIVER_INPUT_MKBP_OLD_COMMAND
Kconfig option and declared it in relevant board defconfigs.

However, the code checks for another Kconfig option, that is not
declared. This uses the proper Kconfig option instead.

BUG=None
Branch=None
Test=Verify that keypresses work fine on a nyan_big

Change-Id: I9566140c075d57d8004cbcf7094a9ff3c64367ac
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://chromium-review.googlesource.com/361930
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
4 years agoGale Board: Update board ID for EVT3
Kan Yan [Fri, 15 Jul 2016 01:29:13 +0000 (18:29 -0700)]
Gale Board: Update board ID for EVT3

BUG=chrome-os-partner:55320
TEST=None
BRANCH=None

Change-Id: I9a730d29206528a4e81f213be50623e61aa9e707
Signed-off-by: Kan Yan <kyan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/361601
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale board: Remove dead code.
Kan Yan [Fri, 15 Jul 2016 01:18:10 +0000 (18:18 -0700)]
Gale board: Remove dead code.

BUG=None
TEST=None
BRANCH=None

Change-Id: Id54315b361e1c7c20eff41aebb2f29c721fbf281
Signed-off-by: Kan Yan <kyan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/361600
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agocros_ec: Change keyboard scanning method.
Aseda Aboagye [Sat, 9 Jul 2016 01:20:32 +0000 (18:20 -0700)]
cros_ec: Change keyboard scanning method.

The Matrix KeyBoard Protocol (MKBP) was recently extended to support
reporting button and switch events. Consequently, support for the
EC_CMD_MKBP_GET_STATE host command was dropped since the keyboard FIFO
became a general MKBP events FIFO and that host command assumed that the
FIFO was strictly for keyboard matrices.  This has been superseded by the
EC_CMD_GET_NEXT_EVENT host command.

Currently, button and switch events may be present in the FIFO, but we
will just ignore those and drop them on the floor.  For those buttons
and switches that we care about, they are handled in different ways.

This commit introduces a new Kconfig:

    CONFIG_DRIVER_INPUT_MKBP_OLD_COMMAND

This config option should be used to enable retrieving of key matrix
changes via EC_CMD_MKBP_GET_STATE. This is for legacy Chrome ECs where
the MKBP FIFO was solely just a key matrix FIFO.

BUG=chromium:626863
BRANCH=None
TEST=Verify that keypresses are recognized during FW screens on kevin.
TEST=Verify that button presses and other events are ignored during FW
screens on kevin.

CQ-DEPEND=CL:358926

Change-Id: Ia9cf29b063178b9eca20e9d2602dc91308e56d4a
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/358989
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agojecht: Increase RO coreboot size on flash
Daisuke Nojiri [Mon, 18 Jul 2016 18:04:57 +0000 (11:04 -0700)]
jecht: Increase RO coreboot size on flash

Bitmap images has been moved to CBFS from GBB. This patch adjusts the flash
size accordingly for jecht.

BUG=chromium:622501,chromium:628494
BRANCH=none
TEST=emerge-jecht chromeos-bootimage
CQ-DEPEND=CL:361370

Change-Id: I1ef5c2487652a548cae2acb6a94efc553d1e09bf
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/361380
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agodt: Remove unused wifi device mapping array
Paul Kocialkowski [Tue, 12 Jul 2016 17:50:16 +0000 (19:50 +0200)]
dt: Remove unused wifi device mapping array

This removes the if_to_address structure that is no longer used. Commit
34b7ddb1a8a1b1bffd20e50efcfa04c8e0f6db6d (dt: function to copy WiFi
calibration data into the device tree) removed any use for this
structure. Thus, it may trigger a compiler warning in some setups.

BUG=None
BRANCH=None
TEST=build depthcharge for veyron_speedy and run it up to the system

Change-Id: I239640cb4d285040d3ea81dd47d8501fb80e4a15
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://chromium-review.googlesource.com/360111
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoInclude config from DOTCONFIG instead of redefinition
Paul Kocialkowski [Sun, 9 Aug 2015 10:06:28 +0000 (12:06 +0200)]
Include config from DOTCONFIG instead of redefinition

This includes config from DOTCONFIG instead of redefining its path.
In addition to removing the duplication and increasing clarity, this
also allows providing the DOTCONFIG path via the make command line.

BUG=None
TEST=build depthcharge for veyron_speedy in tree and out of tree
BRANCH=None

Change-Id: I8b045a8f03e0924f8c6a175c2261151a4fff2ee2
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://chromium-review.googlesource.com/359482
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoarm: March abi flags for ARM (v7 and v8) hardware
Paul Kocialkowski [Mon, 3 Aug 2015 12:39:42 +0000 (14:39 +0200)]
arm: March abi flags for ARM (v7 and v8) hardware

Specifying the march is required to get depthcharge to build with e.g.
the arm toolchain built by coreboot's crossgcc script.

Without this flag, the toolchain will complain that some ARM mrc/mcr ASM
instructions are not defined.

BUG=None
TEST=build depthcharge with a toolchain produced by coreboot's crossgcc
BRANCH=None

Change-Id: I7fa514457c56850266de6efc23a588afc1f34278
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://chromium-review.googlesource.com/359481
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoveyron_mickey: Adapt CONFIG_FMAP_OFFSET after RO CBFS size increase
Paul Kocialkowski [Sun, 10 Jul 2016 16:13:01 +0000 (18:13 +0200)]
veyron_mickey: Adapt CONFIG_FMAP_OFFSET after RO CBFS size increase

Commit d20ef8186c334a2738a1fae04e04d84b1bfca538 (veyron_mickey: Increase
RO CBFS size by 512 Kb) increased the RO CBFS size but didn't update the
FMAP offset accordingly. This makes depthcharge unable to find it.

Adapting CONFIG_FMAP_OFFSET accordingly fixes the issue.

BUG=None
TEST=build veyron_mickey firmware and test that it boots on the device
BRANCH=None

Change-Id: Ie6c7e49ecae358481fb59eefc7c8dafa5ea365d7
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://chromium-review.googlesource.com/359480
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
4 years agogru: plug in coreboot supplied GPIOs for use by depthcharge
Vadim Bendebury [Thu, 14 Jul 2016 06:23:39 +0000 (23:23 -0700)]
gru: plug in coreboot supplied GPIOs for use by depthcharge

Provide the target specific function to retrieve GPIOs using
descriptions supplied by coreboot.

BRANCH=none
BUG=chrome-os-partner:55240
TEST=no more message " Don't have a gpio set up for flag 5." is
     thrown.

Change-Id: Ic9bf1f4667e53663e241bbb3397b46405842e840
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/360490
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoGale Board: Added snoc_pnoc initialization function
Balamurugan Selvarajan [Fri, 24 Jun 2016 13:12:13 +0000 (18:42 +0530)]
Gale Board: Added snoc_pnoc initialization function

snoc_pnoc() does the following functionalities.
   1) Enable AXI master bus Axid translating to confirm all transaction
      submitted by order for Wi-Fi0 and Wi-Fi1.
   2) Enables PNOC_SNOC_MEMTYPE_M0_M2 as normal mode.

BRANCH=None
BUG=None
TEST=System boot

Change-Id: I52d258573c8c314d3ca4960a1e35af6ab095e25d
Signed-off-by: Balamurugan Selvarajan <bselvara@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/355960
Commit-Ready: Kan Yan <kyan@google.com>
Reviewed-by: Kan Yan <kyan@google.com>
4 years agoIncrease RO coreboot size on flash
Daisuke Nojiri [Wed, 22 Jun 2016 19:46:49 +0000 (12:46 -0700)]
Increase RO coreboot size on flash

Bitmap images will be moved to CBFS from GBB. This patch adjust the flash
map accordingly for rambi, samus, peppy, falco, panther, auron, strago.

BUG=chromium:622501
BRANCH=tot
TEST=emerge-{samus,rambi,falco} chromeos-bootimage
CQ-DEPEND=CL:355040,CL:354710

Change-Id: I2967ef16b4ed8fcc16d4ced6212b9e9251085789
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/355100

4 years agogru: Add psci_power_ops
Julius Werner [Fri, 8 Jul 2016 00:25:57 +0000 (17:25 -0700)]
gru: Add psci_power_ops

This patch makes Gru-based boards use the new psci_power_ops driver, so
they can now reboot and shut down correctly.

BRANCH=None
BUG=None
TEST=Triggered reboot and power-off reasons on Kevin, observed how
system reacted correctly.

Change-Id: Idd441b820eb075cdd62b02274a57df92ece26161
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/358923
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoarm64: power: Add new PSCI PowerOps provider
Julius Werner [Thu, 7 Jul 2016 23:57:43 +0000 (16:57 -0700)]
arm64: power: Add new PSCI PowerOps provider

ARM64 systems are by design required to support power-off and reboot
functionality in ARM Trusted Firmware through PSCI calls. Rather than
reimplement the same functionality in depthcharge for every individual
board, we can leverage this by just calling the same code with an SMC.

This patch adds rudimentary SMC functionality to depthcharge and uses it
to implement a PSCI PowerOps provider using the SYSTEM_RESET and
SYSTEM_OFF PSCI calls to reboot and power down, respectively.

BRANCH=None
BUG=None
TEST=Triggered reboot and power-off reasons on Kevin, observed how
system reacted correctly (with follow-up patch).

Change-Id: I5983b19229cdaa3c8e8fb5e49c778d534d8acbb1
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/358922
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agogru / kevin: Fix default HWIDs
Shawn Nematbakhsh [Thu, 30 Jun 2016 20:58:05 +0000 (13:58 -0700)]
gru / kevin: Fix default HWIDs

Don't append 'A-A' volatile-variant to the default HWID, and fix
checksums.

BUG=chrome-os-partner:54964
BRANCH=None
TEST=Manual on kevin. Boot AP, verify "A factory error has been
detected" popup is not encountered.

Change-Id: I4c7e0536db81f214d9df9f527ea1d92c82b0a67d
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/357882
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agork3399: kevin: enabling CONFIG_EC_SOFTWARE_SYNC
Shelley Chen [Tue, 28 Jun 2016 15:47:14 +0000 (08:47 -0700)]
rk3399: kevin: enabling CONFIG_EC_SOFTWARE_SYNC

crossystem needs active-ec-firmware in the
device tree to get the ecfw_act field.

BUG=chrome-os-partner:54566,chrome-os-partner:53988
BRANCH=None
TEST=run crossystem once OS boots up
CQ-DEPEND=CL:357811

Change-Id: I6600e6b0b8b6d9e5e9eae501877bd1f2e5779289
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/356562

4 years agogru: Instantiate SPI TPM driver at startup.
Vadim Bendebury [Thu, 23 Jun 2016 02:17:09 +0000 (19:17 -0700)]
gru: Instantiate SPI TPM driver at startup.

This adds code which creates structures for the SPI interface and the
TPM driver on Gru and Kevin boards.

CQ-DEPEND=CL:356595
BRANCH=none
BUG=chrome-os-partner:50645
TEST=with the rest of the patches applied; attempts of vboot_firmware
     to communicate with the TPM trigger proper TPM initialization
     (which indicates that SPI interface is operational and is plugged
     in properly). Chrome OS boots properly too.

Change-Id: Iedd70bde1f933046de86628844d531e7721dbe79
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/356594
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agogru:kevin: Enable TPM2 support
Vadim Bendebury [Thu, 30 Jun 2016 21:16:38 +0000 (14:16 -0700)]
gru:kevin: Enable TPM2 support

Dropping MOCK_TPM and DRIVER_TPM_SLB9635_I2C accidentally left behind.

CQ-DEPEND=CL:356594
BRANCH=none
BUG=chrome-os-partner:50645
TEST=with the appropriate changes in vboot it is possible to boot to
     chrome os login prompt with rollback protection enabled.

Change-Id: I1defde5caa4e4db2f5ad8dcecbd7e9074e249bda
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/356595
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
4 years agovboot: allow to configure vboot for tpm2 mode
Vadim Bendebury [Mon, 27 Jun 2016 22:29:00 +0000 (15:29 -0700)]
vboot: allow to configure vboot for tpm2 mode

Vboot code needs to behave differently when running on the board with
TPM2.

BRANCH=none
BUG=chrome-os-partner:50645
TEST=it is possible to modify vboot build behavior

Change-Id: I7f250d2295625f4bf045191798fb630235433ca2
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/356593
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
4 years agork3399: kevin: enabling nv flash storage
Shelley Chen [Tue, 28 Jun 2016 00:31:38 +0000 (17:31 -0700)]
rk3399: kevin: enabling nv flash storage

Enabling CONFIG_NV_STORAGE_FLASH.  This enables
nonvolatile-context-* files from the device-tree
directory.

BRANCH=None
BUG=chrome-os-partner:54566,chrome-os-partner:53988
TEST=boot into OS, run crossystem.  Should not see
     errors like:
     Unable to open FDT property nonvolatile-context-lba,
     nonvolatile-context-offset, nonvolatile-context-size

Change-Id: I1df1a11a23bd2097995776732cd2a4442120ab7e
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/356580
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
4 years agoreef: Add SD card as bootable device
Freddy Paul [Wed, 29 Jun 2016 22:02:24 +0000 (15:02 -0700)]
reef: Add SD card as bootable device

This patch adds the SD card bootable device entry in the
board.c for reef.

BRANCH=None
BUG=chrome-os-partner:54917
TEST=Boot via SD card

Change-Id: Ib114b33a9bdc7e60ffc58ffa1c7d7f5646309f70
Signed-off-by: Freddy Paul <freddy.paul@intel.com>
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/357360
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agotpm: disable excessive debug output
Vadim Bendebury [Tue, 28 Jun 2016 01:52:55 +0000 (18:52 -0700)]
tpm: disable excessive debug output

No need to pollute the console output TPM message dumps.

BRANCH=none
BUG=chrome-os-partner:50645
TEST=TPM dumps disappeared from depthcharge console log

Change-Id: I72e288ab588bd51a24f58ae4b423304e2732a986
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/356592
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agotpm: spi: fix stopwatch implementation bug
Vadim Bendebury [Tue, 28 Jun 2016 01:05:31 +0000 (18:05 -0700)]
tpm: spi: fix stopwatch implementation bug

Stopwatch expiration check was expiring immediately, this patch fixes
the bug.

BRANCH=none
BUG=chrome-os-partner:50645
TEST=SPI TPM initialization does not fail any more.

Change-Id: I942ff694a237306eab60834c2cd5096775bfe8b8
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/356591
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoec: fix cros_ec_set_bl_pwm_duty comment
Vadim Bendebury [Fri, 24 Jun 2016 02:47:18 +0000 (19:47 -0700)]
ec: fix cros_ec_set_bl_pwm_duty comment

Add comment to match style of the rest of the file declarations.

BRANCH=none
BUG=none
TEST=none

Change-Id: Ia4c70d1becbd5e9a295c1a36962055ab11667bd7
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/355705
Reviewed-by: Shelley Chen <shchen@chromium.org>
4 years agoGale: Add LED support.
Suresh Rajashekara [Thu, 19 May 2016 00:01:55 +0000 (17:01 -0700)]
Gale: Add LED support.

Reusing the LED patterns as it was defined for Storm/WW/Platform.

BUG=b:29051518
TEST=After about 3 seconds of powering on the device different colors
should be seen at the LED ring, depending on the state of the device.
Alternatively, move the device to different states manually by
appropriate actions (like dev mode, rec mode etc) and observe the
colors.
BRANCH=None

Change-Id: Ib199bb15e65b4eb16017f671f9338fdfaa3ce770
Signed-off-by: Suresh Rajashekara <sureshraj@google.com>
Reviewed-on: https://chromium-review.googlesource.com/355191
Commit-Ready: Suresh Rajashekara <sureshraj@chromium.org>
Tested-by: Suresh Rajashekara <sureshraj@chromium.org>
Reviewed-by: Suresh Rajashekara <sureshraj@chromium.org>
4 years agogru: Read the power button state from the EC
Vadim Bendebury [Fri, 24 Jun 2016 03:16:46 +0000 (20:16 -0700)]
gru: Read the power button state from the EC

On gru and kevin the power button switch is only connected to the EC.
Set up a GPIO to read the button switch from the EC.

BUG=chrome-os-partner:53208
BRANCH=none
TEST=as it looks like the EC acts on power button press on its own.

Change-Id: Ifaad8e3fd52bbe25298b0dcb457c896e64789692
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/355707

4 years agoec: Add support for reading the Power Button state
Vadim Bendebury [Fri, 24 Jun 2016 03:14:28 +0000 (20:14 -0700)]
ec: Add support for reading the Power Button state

Add a function for reading the power button state from the EC via the
memmap. This can be used to read the button, for example, since if it
is only connected to the EC there is no way to use the AP GPIOs.

BUG=chrome-os-partner:53208
BRANCH=none
TEST=none

Change-Id: If87b19a50b413a798e1f11f0aa33d97a08cfab12
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/355706
Reviewed-by: Shawn N <shawnn@chromium.org>
4 years agogru: Read the lid switch from the EC
Simon Glass [Sun, 19 Jun 2016 22:53:39 +0000 (16:53 -0600)]
gru: Read the lid switch from the EC

On gru and kevin the lid switch is only connected to the EC. To
support this, set up a GPIO to read from the EC.

BUG=chrome-os-partner:53208
BRANCH=none
TEST=with the rest of the patches applied, on a Gru device, while
     observing the AP console:

  - reboot the device into linux login prompt

  - reboot the device again, close the lid once the developer mode
    screen is displayed. Observe the device stop booting, printing on
    the console
VbAudioOpen() - note count 1
Lid is closed.
VbBootDeveloper() - shutdown requested!

Change-Id: I91c40eb521029933b84c12cc6749754531abe14e
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/353941
Reviewed-by: Shawn N <shawnn@chromium.org>
4 years agoec: Add support for reading the LID switch
Vadim Bendebury [Fri, 24 Jun 2016 02:50:40 +0000 (19:50 -0700)]
ec: Add support for reading the LID switch

Add a function for reading the lid switch from the EC via the memmap. This
can be used to read the lid switch, for example, since if it is only
connected to the EC there is no way to use the AP GPIOs.

BUG=chrome-os-partner:53208
BRANCH=none

TEST=with the rest of the patches applied, on a Gru device, while
     observing the AP console:

  - reboot the device into linux login prompt

  - reboot the device again, close the lid once the developer mode
    screen is displayed. Observe the device stop booting, printing on
    the console
VbAudioOpen() - note count 1
Lid is closed.
VbBootDeveloper() - shutdown requested!

Change-Id: I705cac1a5ac781d4f382c7079babfb279cdc8627
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/353940
Reviewed-by: Shawn N <shawnn@chromium.org>
4 years agoRevert "gru: Instantiate SPI TPM driver at startup."
Vadim Bendebury [Fri, 24 Jun 2016 18:26:38 +0000 (11:26 -0700)]
Revert "gru: Instantiate SPI TPM driver at startup."

This reverts commit c241485bc7e3f2554d58a58018f51d967cc18a45.

Change-Id: I47f933aa520d735dc8b1ce482cf30d1daec74de9
Reviewed-on: https://chromium-review.googlesource.com/356160
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
4 years agogru: Instantiate SPI TPM driver at startup.
Vadim Bendebury [Thu, 23 Jun 2016 02:17:09 +0000 (19:17 -0700)]
gru: Instantiate SPI TPM driver at startup.

This adds code which creates structures for the SPI interface and the
TPM driver on Gru and Kevin boards.

BRANCH=none
BUG=chrome-os-partner:50645
TEST=with the rest of the patches applied; attempts of vboot_firmware
     to communicate with the TPM trigger proper TPM initialization
     (which indicates that SPI interface is operational and is plugged
     in properly). Chrome OS boot fails because vboot_firmware does not
     speak TPM2 yet.

Change-Id: Ib10f67df772fd53c354ab6323d46ebbfb2a8e700
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/355262

4 years agotpm: introduce TPM SPI driver
Vadim Bendebury [Thu, 23 Jun 2016 02:14:01 +0000 (19:14 -0700)]
tpm: introduce TPM SPI driver

This ports the SPI TPM driver from coreboot. The driver is compliant
with the TCG issued "TPM Profile (PTP) Specification Revision 00.43"
which can be found by googling its title.

The driver implements both the hardware flow control protocol and the
TPM state machine.

The hardware flow control allows to map SPI based TPM devices to the
LPC address space on x86 platforms, on all other platforms it needs to
be implemented in the driver software.

A lot more implementation details can be found in the code comments.

This is not a complete version of the driver: its robustness needs to
be improved, delay loops need to be bound, error conditions need to
propagate up the call stack.

BRANCH=none
BUG=chrome-os-partner:50645, chrome-os-partner:54141
TEST=with the rest of the patches applied; attempts of vboot_firmware
     to communicate with the TPM trigger proper TPM initialization
     (which indicates that SPI interface is operational and is plugged
     in properly). Chrome OS boot fails because vboot_firmware does not
     speak TPM2 yet.

Change-Id: Ic084c8b7ed14a24fd210cfe9ef59430f636696fc
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/355320
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
4 years agoreef: Update fmap.dts file
Furquan Shaikh [Wed, 22 Jun 2016 18:35:35 +0000 (11:35 -0700)]
reef: Update fmap.dts file

1. Mark 256KiB at end of BIOS region as unusable BIOS region is
memory-mapped just below 4GiB, however last 256KiB is unusable. Mark it
accordingly in fmd file.
2. Use up holes in RW region for RW_A and RW_B.
3. Fill up holes in RO with UNUSED regions.

CQ-DEPEND=CL:355741
BUG=chrome-os-partner:54672
BRANCH=None
TEST=Compiles successfully

Change-Id: I13ea617c02a8ab3d282fad1014a8d2594fc54f30
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/354785
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agork3399: kevin: turn on backlight once EC initializes
Shelley Chen [Mon, 20 Jun 2016 17:07:20 +0000 (10:07 -0700)]
rk3399: kevin: turn on backlight once EC initializes

After EC finishes initializing, turn on backlight
with host command EC_CMD_PWM_SET_DUTY.

BUG=chrome-os-partner:54389
BRANCH=None
TEST=reboot ec, ap.  See fw screen
     reboot ap only.  See fw screen

Change-Id: Ib84cf8c2de3ce9df82543b35419322fdaa3f5aa8
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/354070
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoreef: Calculate BIOS mmap details at runtime
Furquan Shaikh [Tue, 21 Jun 2016 12:47:54 +0000 (05:47 -0700)]
reef: Calculate BIOS mmap details at runtime

BUG=chrome-os-partner:54563
BRANCH=None
TEST=Compiles successfully and boots to OS on reef.

Change-Id: If928c3af762adfe6752ba55e39f995309f195c79
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/354381
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agodrivers/flash: Support mmaped flash with non-zero base offset
Furquan Shaikh [Tue, 21 Jun 2016 12:29:28 +0000 (05:29 -0700)]
drivers/flash: Support mmaped flash with non-zero base offset

In some boards e.g. reef, the entire flash is not memory mapped. Instead
only a part of the flash (offset 0x1000 to offset x which covers the
BIOS region) is mapped in the address space. In order to handle such
special cases, a new API is required to allow boards to define the
offset on flash of the base address that is memory mapped. This base
offset needs to be taken care of while accessing any absolute address
within the mmaped range. For older boards, this base_offset defaults to
0.

BUG=chrome-os-partner:54563
BRANCH=None
TEST=Compiles successfully and boots to OS on reef.

Change-Id: I8cc54168235ceeaf561c7e77c0b661ed053bcd4b
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/354380
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agotpm: move buffer size definition to common code
Vadim Bendebury [Wed, 22 Jun 2016 17:16:02 +0000 (10:16 -0700)]
tpm: move buffer size definition to common code

Also change it to match the naming pattern of the other enums of the
group.

BRANCH=none
BUG=chrome-os-partner:50645
TEST=veyron_jaq compiles cleanly

Change-Id: I1b7b25903c20788e8487ab5ebb3ec7c51470fd76
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/354765
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoamenia: Enable software sync in depthcharge
li feng [Thu, 21 Apr 2016 23:41:42 +0000 (16:41 -0700)]
amenia: Enable software sync in depthcharge

Soft sync needs to be enabled in coreboot as well.

BUG=chrome-os-partner:51844
BRANCH=none
TEST=On Amenia TR1.2, observed software sync after boot up, and checked
with console command sysinfo. coreboot image is build with same stitching
as reef.

Change-Id: I63483fbfc7f676a51e56e0c5df140566d98553b3
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/354671
Commit-Ready: Li1 Feng <li1.feng@intel.com>
Tested-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
4 years agoDon't generate .payload files.
Aaron Durbin [Tue, 21 Jun 2016 13:55:26 +0000 (08:55 -0500)]
Don't generate .payload files.

When the switch to CBFS for all the RW slots the .payload files
were dropped. However, the Makefile.inc was still processing them.
Remove the generation of the .payload file. This also allows
cbfstool to be updated which generates .elf files on extraction,
but the current recipe didn't provide an architecture so the
build failed.

BUG=chromium:595715
BRANCH=none
TEST=Built reef with updated cbfstool. No errors about unsupported
     architecture.

Change-Id: I5efee74d96ce9e3f46143c110c05665cd734e65e
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/354166
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
4 years agogru: consolidate gru based boards in common board directory
Vadim Bendebury [Mon, 20 Jun 2016 23:58:27 +0000 (16:58 -0700)]
gru: consolidate gru based boards in common board directory

Kevin and Gru are very similar from the AP firmware point of view, the
only difference is the fact that on Gru it is required to bring up
USB2 interfaces for booting.

A new configuration option is being added to allow to fine tune this
option at the compile time and the rest of board configurations is
being synchronized.

BRANCH=none
BUG=none
TEST=built firmware for both Keving and Gru, booted into the Linux
     command line and successfully ran stressapptest for an hour.

Change-Id: Ifb57a0c3d50a8ca9a7a5acad0c8311e2f2c93d03
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/354250
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agogru: kevin: create ramoops space
Vadim Bendebury [Thu, 16 Jun 2016 02:05:26 +0000 (19:05 -0700)]
gru: kevin: create ramoops space

Invoke the common function allocating ramoops buffer at the highest
available buffer.

BRANCH=none
BUG=chrome-os-partner:54290
TEST=rebooted both kevin and gru with the new firmware, logged in, and
     ran the following commands:

  localhost ~ # ls -l /proc/device-tree/ramoops/
  total 0
  -r--r--r-- 1 root root  8 Dec 31 16:00 compatible
  -r--r--r-- 1 root root  0 Dec 31 16:00 dump-oops
  -r--r--r-- 1 root root  8 Dec 31 16:00 name
  -r--r--r-- 1 root root  4 Dec 31 16:00 record-size
  -r--r--r-- 1 root root 16 Dec 31 16:00 reg
  localhost ~ # od -tx1 /proc/device-tree/ramoops/reg
  0000000 00 00 00 00 f7 ec 00 00 00 00 00 00 00 10 00 00
  0000020
  localhost ~ # od -tx1 /proc/device-tree/ramoops/record-size
  0000000 00 02 00 00
  0000004
  localhost ~ #

Change-Id: Ie202aefec13edf931c7dddb9cc548a71779c149b
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/353181

4 years agocommon function to allocate ramoops buffer
Vadim Bendebury [Thu, 16 Jun 2016 02:02:06 +0000 (19:02 -0700)]
common function to allocate ramoops buffer

This code was first introduced on the storm board under
https://chromium-review.googlesource.com/#/c/227169, and was
thoroughly discussed at the time.

Now it is being moved to a common file so that it is available to
other boards as necessary.

BRANCH=none
BUG=chrome-os-partner:54290
TEST=test compiling storm failed due to unrelated problems. Verified
     that ramoops gets created on kevin (using an additional patch).

Change-Id: Ia76e0a7754d321d5dfda4f402b9177a822cda553
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/353180
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoreef: Add LEGACY and NVRAM sections to fmap.dts
Furquan Shaikh [Wed, 15 Jun 2016 02:08:36 +0000 (19:08 -0700)]
reef: Add LEGACY and NVRAM sections to fmap.dts

CQ-DEPEND=CL:353177
BUG=chrome-os-partner:54390
BRANCH=None
TEST=Compiles successfully

Change-Id: I4a40d82de4ee58e00c14a902a30d32bd2f8ee661
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/352771
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoreef: Change flash size to 16MiB
Furquan Shaikh [Wed, 15 Jun 2016 00:25:01 +0000 (17:25 -0700)]
reef: Change flash size to 16MiB

CQ-DEPEND=CL:*264756, CL:*264755, CL:*264775, CL:353176
BUG=chrome-os-partner:54390
BRANCH=None
TEST=Compiles successfully and boots to OS

Change-Id: I1d56ce518e99a490d6e2dc18bd71c9bf7246557b
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/352730
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agostorage/sdhci: Fix NULL pointer access
Furquan Shaikh [Wed, 15 Jun 2016 02:07:36 +0000 (19:07 -0700)]
storage/sdhci: Fix NULL pointer access

NULL pointer access introduced by
https://chromium-review.googlesource.com/#/c/330283

Also, check return value of bounce_buffer_start.

BUG=chrome-os-partner:54228
BRANCH=None
TEST=Compiles successfully. Did not hang at VbExGetDiskInfo on reef.

Change-Id: I4bfe3dce6e431a9955d593341fdba7d6fe24a45a
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/352770
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Freddy Paul <freddy.paul@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Freddy Paul <freddy.paul@intel.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoreef: Add support for EC SW Sync
Furquan Shaikh [Fri, 10 Jun 2016 00:27:18 +0000 (17:27 -0700)]
reef: Add support for EC SW Sync

BUG=chrome-os-partner:54245
BRANCH=None
TEST=Verified that EC SW Sync works

Change-Id: I6efba59df7300868ec8515ddceabaf016c323b54
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/351347
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoreef: Disable EC SW Sync for now
Furquan Shaikh [Fri, 10 Jun 2016 00:53:19 +0000 (17:53 -0700)]
reef: Disable EC SW Sync for now

Disable EC SW Sync until EC is more stable.

BUG=chrome-os-partner:54245
BRANCH=None
TEST=Verified that GBB flag for disabling EC SW Sync is set

Change-Id: I98b57225fbf8f72d4f1ef192503d3100047919dc
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/351346
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoGale: Remove unnecessary calls to I2C init functions.
Kan Yan [Mon, 6 Jun 2016 21:05:37 +0000 (14:05 -0700)]
Gale: Remove unnecessary calls to I2C init functions.

Remove unnecessary calls to I2C init functions. I2C block is already
initiailziad in coreboot.

BUG=chrome-os-partner:51096
TEST=I2C/TPM functions as expected
BRANCH=None

Change-Id: Id072fcfcd0581143ba197c19681fb352c767e782
Signed-off-by: Kan Yan <kyan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/350602
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale drivers: Fix I2C pin config.
Kan Yan [Tue, 7 Jun 2016 23:48:56 +0000 (16:48 -0700)]
Gale drivers: Fix I2C pin config.

Update GPIO config for I2C and remove unused function ipq_setup_tpm().

BUG=chrome-os-partner:51096
TEST=I2C/TPM functions
BRANCH=None

Change-Id: I988f84895261eb2eb81964226c19447d8bf0824d
Signed-off-by: Kan Yan <kyan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/350601
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agooak/elm: Add support for anx7688 as PD device.
Nicolas Boichat [Mon, 18 Apr 2016 12:22:56 +0000 (20:22 +0800)]
oak/elm: Add support for anx7688 as PD device.

Makes it possible to update ANX7688 FW from AP-FW.

BRANCH=none
BUG=chrome-os-partner:52442
TEST=Boot elm-rev1

Change-Id: I4ecbdf5be5e501b70ccf679b4bd786bf5bfbdb39
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/339476
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoelm: Enable CONFIG_DRIVER_EC_ANX7688
Nicolas Boichat [Tue, 19 Apr 2016 04:14:11 +0000 (12:14 +0800)]
elm: Enable CONFIG_DRIVER_EC_ANX7688

We also need the option on oak so that we can share the same board
file.

BRANCH=none
BUG=chrome-os-partner:52434
TEST=None

Change-Id: Ibd7554d5b8ffb1c3416d939e4050c7b515ca0872
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-on: https://chromium-review.googlesource.com/339498
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoelm: Enable CONFIG_DRIVER_BUS_I2C_CROS_EC_TUNNEL
Nicolas Boichat [Mon, 18 Apr 2016 13:22:07 +0000 (21:22 +0800)]
elm: Enable CONFIG_DRIVER_BUS_I2C_CROS_EC_TUNNEL

On elm board, we'd like to be able to talk to anx7688 through EC
tunnel. We need the option enabled on oak as well, so that we
can share the same firmware board file.

BRANCH=none
BUG=chrome-os-partner:52442
TEST=Boot elm-rev0

Change-Id: Ic6f3d19db03c740087e41638187349055bbe185c
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/350610
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoanx7688: Add support for ANX7688
Nicolas Boichat [Tue, 19 Apr 2016 04:11:51 +0000 (12:11 +0800)]
anx7688: Add support for ANX7688

ANX7688 is a PD + HDMI->DP converter. It contains a firmware
that we update from the AP-FW, at boot time, which is the only
reason to have a driver for it in depthcharge.

We reuse the PD software sync mechanism, with some caveats as
the chip does not have proper RO/RW sections.

BRANCH=none
BUG=chrome-os-partner:52434
TEST=Boot elm-rev0

Change-Id: I4e16dfdfea236a0de5c9f6881e39513457402971
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-on: https://chromium-review.googlesource.com/339497
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoAmenia: Add SD card as bootable device
Bora Guvendik [Wed, 20 Apr 2016 21:50:45 +0000 (14:50 -0700)]
Amenia: Add SD card as bootable device

This patch adds the SD card bootable device entry in the
board.c for amenia.

BUG=chrome-os-partner:54154
TEST=Boot via SD card

Change-Id: I851e3c8b8373d970a59281a0a9d9bf73e19f9c11
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/350521
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agocros_ec: Sync commands.h with current version in EC codebase
Nicolas Boichat [Fri, 3 Jun 2016 08:58:11 +0000 (16:58 +0800)]
cros_ec: Sync commands.h with current version in EC codebase

BUG=chrome-os-partner:52433
TEST=None
BRANCH=None
CQ-DEPEND=CL:342584

Change-Id: I9c75ee90dd05f03e0dc798fd4c4ba6693ccd4fa7
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-on: https://chromium-review.googlesource.com/349442
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agovboot: ec: Store vboot hash for EC image in a separate file
Julius Werner [Fri, 27 May 2016 23:33:04 +0000 (16:33 -0700)]
vboot: ec: Store vboot hash for EC image in a separate file

CBFS attributes are mostly useful for uses within CBFS itself, such as
the transparent compression. Using the CBFS hash attribute for vboot
causes multiple problems: it forces us to use hashes that CBFS can
understand and generate on its own (whereas for some of our newer PD
chips we'd like to feed vboot a "hash" that's not really a hash at all,
but just a version number), and it prevents us from compressing the EC
images in CBFS (since the CBFS hash attribute was originally designed
for verification and thus always hashes the compressed data). Things
will become easier if we just split these two distinct things apart.

This patch instead just assumes that for every EC image file X, there is
also a file X.hash which contains the vboot hash for it (e.g.
"ecrw.hash"). When vboot asks us for the hash we look up this hash file,
and when it asks us for the full image we look up the normal image file.
The hashes will be precomputed by the build system in a way that allows
customization per chip type.

CQ-DEPEND=CL:348054
BRANCH=None
BUG=chrome-os-partner:53780
TEST=Forced software sync on Oak in multiple scenarios.

Change-Id: I3bfcc8eaa54c4559fe7d4c28dd74f030ebc8455c
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/348061
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoreef: Update fmap.dts for IFWI and SIGN_CSE regions
Furquan Shaikh [Mon, 30 May 2016 16:49:28 +0000 (09:49 -0700)]
reef: Update fmap.dts for IFWI and SIGN_CSE regions

Rename bootblock to IFWI region and add appropriate blob type to
it. Also, add appropriate blob type to SIGN_CSE region.

CQ-DEPEND=CL:348022
BUG=chrome-os-partner:53689
BRANCH=None
TEST=Compiles successfully

Change-Id: If7330f98748ea3258e912f557e6dace424f0189e
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/348058
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoGale Board: Disable ADSS clock branch
Varadarajan Narayanan [Mon, 30 May 2016 08:17:41 +0000 (13:47 +0530)]
Gale Board: Disable ADSS clock branch

To ensure that clocks enabled by default do not get driven
automatically once the GPIOs are configured, turn them off
here.

BUG=chrome-os-partner:53767
TEST=System boot
BRANCH=None

Change-Id: I90b19086028c1b0995aa241fd192f6f26973bc73
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/348171
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoreef: Correct fmap.dts details
Furquan Shaikh [Mon, 30 May 2016 17:55:48 +0000 (10:55 -0700)]
reef: Correct fmap.dts details

Fix fmap.dts inconsistencies to match defaults in other boards.

BUG=chrome-os-partner:53689
BRANCH=None
TEST=Compiles successfully

Change-Id: I4f1d8b16e76c8878606bf90acdb0ed83deccac38
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/348093
Commit-Ready: Aaron Durbin <adurbin@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoreef: fmap: Mark ro-vpd region as wiped to ff
Furquan Shaikh [Fri, 27 May 2016 22:57:36 +0000 (15:57 -0700)]
reef: fmap: Mark ro-vpd region as wiped to ff

BUG=chrome-os-partner:53689
BRANCH=None
TEST=Verified that ro-vpd region is wiped to all ff

Change-Id: I9586766ab1697340a41a2dfb70f03fbe58269858
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/348021
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoreef: fmap: Correct the ifd region marking
Furquan Shaikh [Fri, 27 May 2016 21:19:11 +0000 (14:19 -0700)]
reef: fmap: Correct the ifd region marking

IFD region is only the descriptor from 0 to 4KiB. Mark it accordingly.

CQ-DEPEND=CL:348020
BUG=chrome-os-partner:53689
BRANCH=None
TEST="emerge-reef depthcharge chromeos-bootimage" successful

Change-Id: I42be1caf6108b63e3aeca76f0b4e1c66cc19d9c3
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/347986
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoreef: increase BIOS region size
Aaron Durbin [Thu, 26 May 2016 17:19:46 +0000 (12:19 -0500)]
reef: increase BIOS region size

The new descriptors utilize a 512KiB device expansion region for the
CSE's use. This allows the BIOS region to increase as the expansion
region decreased. Adjust the fmap as well as the macro marking the
end of the BIOS region. The CSE_SIGN region needed to be moved to
reflect the new location of the logical boot partition 2 since
the BIOS region increased. The GBB also had to be decreased to
accommodate the new LBP2 location.

BUG=chrome-os-partner:53689
BRANCH=None
TEST=None

Change-Id: Ib40335b9c0adfa824cec30768a87e12007735e59
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/347482
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
4 years agoGru: add usb initial support
Liangfeng Wu [Tue, 24 May 2016 11:35:46 +0000 (19:35 +0800)]
Gru: add usb initial support

Gru can boot from USB2.0 host1 or both USB3.0
interfaces on rockchip rk3399 platform.

BRANCH=none
BUG=chrome-os-partner:52684
TEST=boot from USB

Change-Id: I649acc11d6821f3646f950ca387257b37a07f90e
Signed-off-by: Liangfeng Wu <wulf@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/346826
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
4 years agoKevin: add usb initial support
Liangfeng Wu [Tue, 24 May 2016 12:30:45 +0000 (20:30 +0800)]
Kevin: add usb initial support

Kevin can boot from both USB3.0 interfaces on rockchip
rk3399 platform. And both USB2.0 interfaces not needed
in firmware on this board.

BRANCH=none
BUG=chrome-os-partner:52684
TEST=boot from USB

Change-Id: I2a829ab838327a8da3e7289609637a7f104d2158
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Liangfeng Wu <wulf@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/345667
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
4 years agommc: retries all failed commands.
Vincent Palatin [Wed, 25 May 2016 22:00:49 +0000 (15:00 -0700)]
mmc: retries all failed commands.

Retry a second time all failed MMC commands.

On veyron_tiger, after a warm reset (which is cutting only VCC on the eMMC),
CMD0(GO_IDLE) and CMD1(SEND_OP_COND) are randomly failing the first time.
This workarounds the issue.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=veyron
BUG=chrome-os-partner:53606
TEST=On veyron_tiger, execute a lot of warm_reboot and see the system booting
from eMMC properly every time rather than falling back in recovery mode.
(with and without serial traces enabled in the bootloader)

Change-Id: I87d68bf1ef6dca55ff098e2fb4a72e0719c73798
Reviewed-on: https://chromium-review.googlesource.com/347440
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agovboot: Remove legacy main routines
Randall Spangler [Thu, 19 May 2016 20:09:42 +0000 (13:09 -0700)]
vboot: Remove legacy main routines

The legacy vboot main (ro_main and rw_main) is unused by any current
boards; everything now uses depthcharge_unified.  The legacy mains make
calls to the vboot1 library in vboot_reference, which is being removed
in favor of vboot2.

Remove this dead code.  No change to the unified main routine or
anything it calls.

BUG=chromium:614780
BRANCH=none
TEST=build samus; run PFQ to test building other current boards

Change-Id: Ibb101b7021dde2aa9d9d1172b4f340fabe6aad91
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/347414
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoKevin: Add support audio path with max98357a
Xing Zheng [Thu, 19 May 2016 07:04:25 +0000 (15:04 +0800)]
Kevin: Add support audio path with max98357a

This patch add rockchip i2s route path via the speaker amp
max98357a.

BRANCH=none
BUG=chrome-os-partner:52172
TEST=boot kevin rev1, press ctrl+u and hear the beep voice.

Change-Id: I8cab7fa688f03d173ccdd82e7e30db7562b1472e
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/345745
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
4 years agosound: Use the general GpioOps paramater for max98357a
Xing Zheng [Thu, 19 May 2016 06:44:34 +0000 (14:44 +0800)]
sound: Use the general GpioOps paramater for max98357a

Because the GpioCfg is the private structure and only is used on the
Intel platform. The max98357a is a common DAC driver, it should be
referred by any other SoCs. We need to use the GpioOps to instead of it.

BRANCH=none
BUG=chrome-os-partner:52172
TEST=boot kevin rev1, press ctrl+u and hear the beep voice.

Change-Id: I297790ab4eba3f217d2152cc7f45baf51c3ffc3f
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/345744
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
4 years agoreef: Sync fmap.dts with chromeos.fmd and fix offsets
Furquan Shaikh [Thu, 26 May 2016 00:01:46 +0000 (17:01 -0700)]
reef: Sync fmap.dts with chromeos.fmd and fix offsets

CQ-DEPEND=CL:347441
BUG=chrome-os-partner:53689
BRANCH=None
TEST="emerge-reef chromeos-bootimage" completes without error

Change-Id: Ic73d11ac2d0ab4f7e3d57327f1abe40cebe39bab
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/347460
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoi2c: cros_ec_tunnel: Add support for enabling pass-thru protection
Nicolas Boichat [Wed, 18 May 2016 07:57:27 +0000 (15:57 +0800)]
i2c: cros_ec_tunnel: Add support for enabling pass-thru protection

Makes it possible to call EC commands to restricts I2C passthru,
for example after ANX7688 firmware has been updated.

BRANCH=none
BUG=chrome-os-partner:52434
BUG=chrome-os-partner:52431
TEST=Build and boot elm

Change-Id: I9171f835f17059d50a4fb1b7456f8c7895d2cbd4
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-on: https://chromium-review.googlesource.com/345811
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoelm: Enable CONFIG_DRIVER_BUS_I2C_CROS_EC_TUNNEL
Nicolas Boichat [Mon, 18 Apr 2016 13:22:07 +0000 (21:22 +0800)]
elm: Enable CONFIG_DRIVER_BUS_I2C_CROS_EC_TUNNEL

On elm board, we'd like to be able to talk to anx7688 through EC
tunnel.

BRANCH=none
BUG=chrome-os-partner:52442
TEST=Boot elm-rev0

Change-Id: Ib47b5f5999d70c0ffd562a5b740959bf979476af
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/339475
Reviewed-by: Randall Spangler <rspangler@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoreef: fmap.dts: Add label for device-extension region
Furquan Shaikh [Wed, 25 May 2016 16:39:24 +0000 (09:39 -0700)]
reef: fmap.dts: Add label for device-extension region

BUG=chrome-os-partner:53689
BRANCH=None
TEST=cros_bundle_firmware no longer complains about missing label

Change-Id: I081507642709b92074af00f30f57d6136c1394c8
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/347303
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoreef: fmap.dts: Add missing semicolon
Furquan Shaikh [Wed, 25 May 2016 16:18:20 +0000 (09:18 -0700)]
reef: fmap.dts: Add missing semicolon

BUG=chrome-os-partner:53689
BRANCH=None
TEST=Compiles successfully

Change-Id: I8465014d6c15bf1585246cc95a9c8e3d1307b554
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/347353
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agocros_ec: Sync commands.h with current version in EC codebase
Nicolas Boichat [Wed, 25 May 2016 10:54:30 +0000 (18:54 +0800)]
cros_ec: Sync commands.h with current version in EC codebase

BUG=chrome-os-partner:52431
TEST=None
BRANCH=None

Change-Id: I866ef8916b6041409315f042fbec90a6abe62664
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/347310
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agooak: Fix memory leak in backlight_update()
Julius Werner [Fri, 20 May 2016 22:02:44 +0000 (15:02 -0700)]
oak: Fix memory leak in backlight_update()

The display_ops->backlight_update() handler will be called more than
once, especially if people move around between languages with the arrow
keys much. We need to make sure we only initialize all GPIO objects once
so that we don't leak memory.

BRANCH=None
BUG=chrome-os-partner:52554
TEST=Tapping back and forth between languages no longer causes missing
screens and OOM crashes.

Change-Id: I4aa563176dd8bbf5f22f9ffccc02682cfeefe3b4
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/346217
Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoconfig: Ensure sane minimum heap sizes across boards
Julius Werner [Fri, 20 May 2016 22:15:53 +0000 (15:15 -0700)]
config: Ensure sane minimum heap sizes across boards

While some boards use the standard 32MB heap size, some explicitly limit
it to lower values. (I'm not quite sure if all of those are really
deliberate or just the result of copy&paste.) Keeping the heap small has
a little boot time benefit (for zeroing out less memory), but overdoing
it runs the risk of OOM issues. The advent of CBFS-based imagery seems
to have increased our memory requirements by a bit (with the
memory-mapped vbgfx.bin alone taking over 1MB), so that a 6MB heap on a
board that already needs 4MB to mirror the SPI flash is dangerously
close to exhaustion. This patch increases all those heaps to 8MB which
ought to be enough for anybody.

BRANCH=None
BUG=chrome-os-partner:52554
TEST=I can keep cycling through firmware languages for several minutes
without any bugs or crashes, despite a small memory leak.

Change-Id: Iac42867d4ab14a61247a37449c2cd59a52d84bdd
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/346216
Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agokevin: enable keyboard
Vadim Bendebury [Sun, 22 May 2016 23:58:53 +0000 (16:58 -0700)]
kevin: enable keyboard

This patch configures and enables SPI EC based keyboard on Kevin.

BRANCH=none
BUG=chrome-os-partner:51537
TEST=pressing ^U at the right time allows to boot Chrome OS from the
     SD card.

Change-Id: I95d0eafd9157d78b0a5af458606e6c1bf4cf46c8
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/346641
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agogru: enable keyboard
Vadim Bendebury [Thu, 19 May 2016 16:03:38 +0000 (09:03 -0700)]
gru: enable keyboard

This patch configures and enables SPI EC based keyboard on Gru.

BRANCH=none
BUG=chrome-os-partner:51537
TEST=pressing ^U at the right time allows to boot Chrome OS from the
     SD card.

Change-Id: I802a9bd0620949b3e924026305faf3cb175f6582
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/346640
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoveyron_*: Remove obsolete Chromeboxes
David Hendricks [Wed, 18 May 2016 01:00:34 +0000 (18:00 -0700)]
veyron_*: Remove obsolete Chromeboxes

This removes brain, danger, emile, and romy from the tree.

BUG=chromium:612660
BRANCH=none
TEST=none

Change-Id: Ia171a366f81e41dbf828647b5300cbe5d53bb7d6
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/345583
Reviewed-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoAmenia: the changes to support 512KB device extension
Bora Guvendik [Tue, 17 May 2016 23:01:18 +0000 (16:01 -0700)]
Amenia: the changes to support 512KB device extension

Increase memory mapped flash region by 512KB

BUG=chrome-os-partner:52589
TEST=Build Coreboot and boots
CQ-DEPEND=CL:*259448,CL:*259445

Change-Id: Ic32b747b17e224b6d7705ceeac76201ee7cbb82d
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/345642
Reviewed-by: Aaron Durbin <adurbin@google.com>
4 years agocbfs: Adapt to new libpayload CBFS API
Julius Werner [Thu, 12 May 2016 23:09:07 +0000 (16:09 -0700)]
cbfs: Adapt to new libpayload CBFS API

This patch accommodates the removal of cbfs_get_file() and the
introduction of the new cbfs_handle API in libpayload. In particular, it
makes sure that VbExEcGetExpectedImageHash() no longer maps in the whole
EC-RW image.

CQ-DEPEND=CL:344459
BRANCH=None
BUG=None
TEST=Booted Oak. Observed ~125ms faster boot time.

Change-Id: I793f99ad3b4d1519f114e829ea08ab2be5ac1ed1
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/344602
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoadd initial reef mainboard support
Aaron Durbin [Mon, 16 May 2016 21:45:54 +0000 (16:45 -0500)]
add initial reef mainboard support

BUG=chrome-os-partner:53083
BRANCH=None
TEST=Built depthcharge for reef.

Change-Id: I3fd83929fc6323a6dc0841afb17ca6b56e4a340b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/344817
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
4 years agoGale drivers: Use block mode for I2C
Varadarajan Narayanan [Sun, 15 May 2016 11:01:49 +0000 (16:31 +0530)]
Gale drivers: Use block mode for I2C

In FIFO mode, the I2C driver was not able to fetch
more than 32 bytes of data from the TPM driver. Switch to
block mode to be able to read more data.

BUG=chrome-os-partner:51096
TEST=Able to retrieve NVRAM content from TPM
BRANCH=None

Change-Id: I30641ed0e10a3450c3ec370fb12000bf5b5b6f2c
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/344820
Commit-Ready: Kan Yan <kyan@google.com>
Tested-by: Kan Yan <kyan@google.com>
Reviewed-by: Kan Yan <kyan@google.com>
4 years ago[HACK]APL: Force warm reset instead of cold reset
Zhao, Lijian [Fri, 29 Apr 2016 22:32:04 +0000 (15:32 -0700)]
[HACK]APL: Force warm reset instead of cold reset

To avoid the USB LDO issue happened on some of the Apollolake
A0 silicon.

BUG=chrome-os-partner:52124
BRANCH=master
TEST=Failed SOC now can boot up into kernel with working USBA.

Change-Id: I37bfb965b16921cdc36dae5e8e11068b9c6a3b7e
Signed-off-by: Zhao, Lijian <lijian.zhao@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/342751
Commit-Ready: Andrey Petrov <andrey.petrov@gmail.com>
Tested-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agomtk-mmc: Add tune_reg to support more EMMC devices
Chaotian Jing [Wed, 11 May 2016 09:56:41 +0000 (17:56 +0800)]
mtk-mmc: Add tune_reg to support more EMMC devices

Different EMMC device has different timing, need to find a
register setting to cover all eMMC chips

BUG=chrome-os-partner:52680
BRANCH=None
TEST=Verified on oak-rev5, elm-rev0, elm-rev1 SKU1, elm-rev1 SKU2

Change-Id: I3de39b0ce6c64369d8f58ac3c71586b636639b42
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/344155
Commit-Ready: Yidi Lin <yidi.lin@mediatek.com>
Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agocheckpatch: Ignore LINE_SPACING
Julius Werner [Sat, 30 Apr 2016 01:57:00 +0000 (18:57 -0700)]
checkpatch: Ignore LINE_SPACING

The newest checkpatch version now flags code such as

int i;
for (i = 0; ...

because there is no blank line between a declaration and the next
statement. We have always allowed variable declarations inline with the
code in depthcharge, so this doesn't make much sense for us. Add it to
the ignore list.

BRANCH=None
BUG=None
TEST=None

Change-Id: I982edc503dfd4870a20bf59d5aadacb0aa4f5df7
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/341474
Reviewed-by: Aaron Durbin <adurbin@chromium.org>