depthcharge.git
4 years agoreef: Calculate BIOS mmap details at runtime
Furquan Shaikh [Tue, 21 Jun 2016 12:47:54 +0000 (05:47 -0700)]
reef: Calculate BIOS mmap details at runtime

BUG=chrome-os-partner:54563
BRANCH=None
TEST=Compiles successfully and boots to OS on reef.

Change-Id: If928c3af762adfe6752ba55e39f995309f195c79
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/354381
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agodrivers/flash: Support mmaped flash with non-zero base offset
Furquan Shaikh [Tue, 21 Jun 2016 12:29:28 +0000 (05:29 -0700)]
drivers/flash: Support mmaped flash with non-zero base offset

In some boards e.g. reef, the entire flash is not memory mapped. Instead
only a part of the flash (offset 0x1000 to offset x which covers the
BIOS region) is mapped in the address space. In order to handle such
special cases, a new API is required to allow boards to define the
offset on flash of the base address that is memory mapped. This base
offset needs to be taken care of while accessing any absolute address
within the mmaped range. For older boards, this base_offset defaults to
0.

BUG=chrome-os-partner:54563
BRANCH=None
TEST=Compiles successfully and boots to OS on reef.

Change-Id: I8cc54168235ceeaf561c7e77c0b661ed053bcd4b
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/354380
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agotpm: move buffer size definition to common code
Vadim Bendebury [Wed, 22 Jun 2016 17:16:02 +0000 (10:16 -0700)]
tpm: move buffer size definition to common code

Also change it to match the naming pattern of the other enums of the
group.

BRANCH=none
BUG=chrome-os-partner:50645
TEST=veyron_jaq compiles cleanly

Change-Id: I1b7b25903c20788e8487ab5ebb3ec7c51470fd76
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/354765
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoamenia: Enable software sync in depthcharge
li feng [Thu, 21 Apr 2016 23:41:42 +0000 (16:41 -0700)]
amenia: Enable software sync in depthcharge

Soft sync needs to be enabled in coreboot as well.

BUG=chrome-os-partner:51844
BRANCH=none
TEST=On Amenia TR1.2, observed software sync after boot up, and checked
with console command sysinfo. coreboot image is build with same stitching
as reef.

Change-Id: I63483fbfc7f676a51e56e0c5df140566d98553b3
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/354671
Commit-Ready: Li1 Feng <li1.feng@intel.com>
Tested-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
4 years agoDon't generate .payload files.
Aaron Durbin [Tue, 21 Jun 2016 13:55:26 +0000 (08:55 -0500)]
Don't generate .payload files.

When the switch to CBFS for all the RW slots the .payload files
were dropped. However, the Makefile.inc was still processing them.
Remove the generation of the .payload file. This also allows
cbfstool to be updated which generates .elf files on extraction,
but the current recipe didn't provide an architecture so the
build failed.

BUG=chromium:595715
BRANCH=none
TEST=Built reef with updated cbfstool. No errors about unsupported
     architecture.

Change-Id: I5efee74d96ce9e3f46143c110c05665cd734e65e
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/354166
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
4 years agogru: consolidate gru based boards in common board directory
Vadim Bendebury [Mon, 20 Jun 2016 23:58:27 +0000 (16:58 -0700)]
gru: consolidate gru based boards in common board directory

Kevin and Gru are very similar from the AP firmware point of view, the
only difference is the fact that on Gru it is required to bring up
USB2 interfaces for booting.

A new configuration option is being added to allow to fine tune this
option at the compile time and the rest of board configurations is
being synchronized.

BRANCH=none
BUG=none
TEST=built firmware for both Keving and Gru, booted into the Linux
     command line and successfully ran stressapptest for an hour.

Change-Id: Ifb57a0c3d50a8ca9a7a5acad0c8311e2f2c93d03
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/354250
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agogru: kevin: create ramoops space
Vadim Bendebury [Thu, 16 Jun 2016 02:05:26 +0000 (19:05 -0700)]
gru: kevin: create ramoops space

Invoke the common function allocating ramoops buffer at the highest
available buffer.

BRANCH=none
BUG=chrome-os-partner:54290
TEST=rebooted both kevin and gru with the new firmware, logged in, and
     ran the following commands:

  localhost ~ # ls -l /proc/device-tree/ramoops/
  total 0
  -r--r--r-- 1 root root  8 Dec 31 16:00 compatible
  -r--r--r-- 1 root root  0 Dec 31 16:00 dump-oops
  -r--r--r-- 1 root root  8 Dec 31 16:00 name
  -r--r--r-- 1 root root  4 Dec 31 16:00 record-size
  -r--r--r-- 1 root root 16 Dec 31 16:00 reg
  localhost ~ # od -tx1 /proc/device-tree/ramoops/reg
  0000000 00 00 00 00 f7 ec 00 00 00 00 00 00 00 10 00 00
  0000020
  localhost ~ # od -tx1 /proc/device-tree/ramoops/record-size
  0000000 00 02 00 00
  0000004
  localhost ~ #

Change-Id: Ie202aefec13edf931c7dddb9cc548a71779c149b
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/353181

4 years agocommon function to allocate ramoops buffer
Vadim Bendebury [Thu, 16 Jun 2016 02:02:06 +0000 (19:02 -0700)]
common function to allocate ramoops buffer

This code was first introduced on the storm board under
https://chromium-review.googlesource.com/#/c/227169, and was
thoroughly discussed at the time.

Now it is being moved to a common file so that it is available to
other boards as necessary.

BRANCH=none
BUG=chrome-os-partner:54290
TEST=test compiling storm failed due to unrelated problems. Verified
     that ramoops gets created on kevin (using an additional patch).

Change-Id: Ia76e0a7754d321d5dfda4f402b9177a822cda553
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/353180
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoreef: Add LEGACY and NVRAM sections to fmap.dts
Furquan Shaikh [Wed, 15 Jun 2016 02:08:36 +0000 (19:08 -0700)]
reef: Add LEGACY and NVRAM sections to fmap.dts

CQ-DEPEND=CL:353177
BUG=chrome-os-partner:54390
BRANCH=None
TEST=Compiles successfully

Change-Id: I4a40d82de4ee58e00c14a902a30d32bd2f8ee661
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/352771
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoreef: Change flash size to 16MiB
Furquan Shaikh [Wed, 15 Jun 2016 00:25:01 +0000 (17:25 -0700)]
reef: Change flash size to 16MiB

CQ-DEPEND=CL:*264756, CL:*264755, CL:*264775, CL:353176
BUG=chrome-os-partner:54390
BRANCH=None
TEST=Compiles successfully and boots to OS

Change-Id: I1d56ce518e99a490d6e2dc18bd71c9bf7246557b
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/352730
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agostorage/sdhci: Fix NULL pointer access
Furquan Shaikh [Wed, 15 Jun 2016 02:07:36 +0000 (19:07 -0700)]
storage/sdhci: Fix NULL pointer access

NULL pointer access introduced by
https://chromium-review.googlesource.com/#/c/330283

Also, check return value of bounce_buffer_start.

BUG=chrome-os-partner:54228
BRANCH=None
TEST=Compiles successfully. Did not hang at VbExGetDiskInfo on reef.

Change-Id: I4bfe3dce6e431a9955d593341fdba7d6fe24a45a
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/352770
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Freddy Paul <freddy.paul@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Freddy Paul <freddy.paul@intel.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoreef: Add support for EC SW Sync
Furquan Shaikh [Fri, 10 Jun 2016 00:27:18 +0000 (17:27 -0700)]
reef: Add support for EC SW Sync

BUG=chrome-os-partner:54245
BRANCH=None
TEST=Verified that EC SW Sync works

Change-Id: I6efba59df7300868ec8515ddceabaf016c323b54
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/351347
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoreef: Disable EC SW Sync for now
Furquan Shaikh [Fri, 10 Jun 2016 00:53:19 +0000 (17:53 -0700)]
reef: Disable EC SW Sync for now

Disable EC SW Sync until EC is more stable.

BUG=chrome-os-partner:54245
BRANCH=None
TEST=Verified that GBB flag for disabling EC SW Sync is set

Change-Id: I98b57225fbf8f72d4f1ef192503d3100047919dc
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/351346
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoGale: Remove unnecessary calls to I2C init functions.
Kan Yan [Mon, 6 Jun 2016 21:05:37 +0000 (14:05 -0700)]
Gale: Remove unnecessary calls to I2C init functions.

Remove unnecessary calls to I2C init functions. I2C block is already
initiailziad in coreboot.

BUG=chrome-os-partner:51096
TEST=I2C/TPM functions as expected
BRANCH=None

Change-Id: Id072fcfcd0581143ba197c19681fb352c767e782
Signed-off-by: Kan Yan <kyan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/350602
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale drivers: Fix I2C pin config.
Kan Yan [Tue, 7 Jun 2016 23:48:56 +0000 (16:48 -0700)]
Gale drivers: Fix I2C pin config.

Update GPIO config for I2C and remove unused function ipq_setup_tpm().

BUG=chrome-os-partner:51096
TEST=I2C/TPM functions
BRANCH=None

Change-Id: I988f84895261eb2eb81964226c19447d8bf0824d
Signed-off-by: Kan Yan <kyan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/350601
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agooak/elm: Add support for anx7688 as PD device.
Nicolas Boichat [Mon, 18 Apr 2016 12:22:56 +0000 (20:22 +0800)]
oak/elm: Add support for anx7688 as PD device.

Makes it possible to update ANX7688 FW from AP-FW.

BRANCH=none
BUG=chrome-os-partner:52442
TEST=Boot elm-rev1

Change-Id: I4ecbdf5be5e501b70ccf679b4bd786bf5bfbdb39
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/339476
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoelm: Enable CONFIG_DRIVER_EC_ANX7688
Nicolas Boichat [Tue, 19 Apr 2016 04:14:11 +0000 (12:14 +0800)]
elm: Enable CONFIG_DRIVER_EC_ANX7688

We also need the option on oak so that we can share the same board
file.

BRANCH=none
BUG=chrome-os-partner:52434
TEST=None

Change-Id: Ibd7554d5b8ffb1c3416d939e4050c7b515ca0872
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-on: https://chromium-review.googlesource.com/339498
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoelm: Enable CONFIG_DRIVER_BUS_I2C_CROS_EC_TUNNEL
Nicolas Boichat [Mon, 18 Apr 2016 13:22:07 +0000 (21:22 +0800)]
elm: Enable CONFIG_DRIVER_BUS_I2C_CROS_EC_TUNNEL

On elm board, we'd like to be able to talk to anx7688 through EC
tunnel. We need the option enabled on oak as well, so that we
can share the same firmware board file.

BRANCH=none
BUG=chrome-os-partner:52442
TEST=Boot elm-rev0

Change-Id: Ic6f3d19db03c740087e41638187349055bbe185c
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/350610
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoanx7688: Add support for ANX7688
Nicolas Boichat [Tue, 19 Apr 2016 04:11:51 +0000 (12:11 +0800)]
anx7688: Add support for ANX7688

ANX7688 is a PD + HDMI->DP converter. It contains a firmware
that we update from the AP-FW, at boot time, which is the only
reason to have a driver for it in depthcharge.

We reuse the PD software sync mechanism, with some caveats as
the chip does not have proper RO/RW sections.

BRANCH=none
BUG=chrome-os-partner:52434
TEST=Boot elm-rev0

Change-Id: I4e16dfdfea236a0de5c9f6881e39513457402971
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-on: https://chromium-review.googlesource.com/339497
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoAmenia: Add SD card as bootable device
Bora Guvendik [Wed, 20 Apr 2016 21:50:45 +0000 (14:50 -0700)]
Amenia: Add SD card as bootable device

This patch adds the SD card bootable device entry in the
board.c for amenia.

BUG=chrome-os-partner:54154
TEST=Boot via SD card

Change-Id: I851e3c8b8373d970a59281a0a9d9bf73e19f9c11
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/350521
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agocros_ec: Sync commands.h with current version in EC codebase
Nicolas Boichat [Fri, 3 Jun 2016 08:58:11 +0000 (16:58 +0800)]
cros_ec: Sync commands.h with current version in EC codebase

BUG=chrome-os-partner:52433
TEST=None
BRANCH=None
CQ-DEPEND=CL:342584

Change-Id: I9c75ee90dd05f03e0dc798fd4c4ba6693ccd4fa7
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-on: https://chromium-review.googlesource.com/349442
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agovboot: ec: Store vboot hash for EC image in a separate file
Julius Werner [Fri, 27 May 2016 23:33:04 +0000 (16:33 -0700)]
vboot: ec: Store vboot hash for EC image in a separate file

CBFS attributes are mostly useful for uses within CBFS itself, such as
the transparent compression. Using the CBFS hash attribute for vboot
causes multiple problems: it forces us to use hashes that CBFS can
understand and generate on its own (whereas for some of our newer PD
chips we'd like to feed vboot a "hash" that's not really a hash at all,
but just a version number), and it prevents us from compressing the EC
images in CBFS (since the CBFS hash attribute was originally designed
for verification and thus always hashes the compressed data). Things
will become easier if we just split these two distinct things apart.

This patch instead just assumes that for every EC image file X, there is
also a file X.hash which contains the vboot hash for it (e.g.
"ecrw.hash"). When vboot asks us for the hash we look up this hash file,
and when it asks us for the full image we look up the normal image file.
The hashes will be precomputed by the build system in a way that allows
customization per chip type.

CQ-DEPEND=CL:348054
BRANCH=None
BUG=chrome-os-partner:53780
TEST=Forced software sync on Oak in multiple scenarios.

Change-Id: I3bfcc8eaa54c4559fe7d4c28dd74f030ebc8455c
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/348061
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoreef: Update fmap.dts for IFWI and SIGN_CSE regions
Furquan Shaikh [Mon, 30 May 2016 16:49:28 +0000 (09:49 -0700)]
reef: Update fmap.dts for IFWI and SIGN_CSE regions

Rename bootblock to IFWI region and add appropriate blob type to
it. Also, add appropriate blob type to SIGN_CSE region.

CQ-DEPEND=CL:348022
BUG=chrome-os-partner:53689
BRANCH=None
TEST=Compiles successfully

Change-Id: If7330f98748ea3258e912f557e6dace424f0189e
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/348058
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoGale Board: Disable ADSS clock branch
Varadarajan Narayanan [Mon, 30 May 2016 08:17:41 +0000 (13:47 +0530)]
Gale Board: Disable ADSS clock branch

To ensure that clocks enabled by default do not get driven
automatically once the GPIOs are configured, turn them off
here.

BUG=chrome-os-partner:53767
TEST=System boot
BRANCH=None

Change-Id: I90b19086028c1b0995aa241fd192f6f26973bc73
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/348171
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoreef: Correct fmap.dts details
Furquan Shaikh [Mon, 30 May 2016 17:55:48 +0000 (10:55 -0700)]
reef: Correct fmap.dts details

Fix fmap.dts inconsistencies to match defaults in other boards.

BUG=chrome-os-partner:53689
BRANCH=None
TEST=Compiles successfully

Change-Id: I4f1d8b16e76c8878606bf90acdb0ed83deccac38
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/348093
Commit-Ready: Aaron Durbin <adurbin@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoreef: fmap: Mark ro-vpd region as wiped to ff
Furquan Shaikh [Fri, 27 May 2016 22:57:36 +0000 (15:57 -0700)]
reef: fmap: Mark ro-vpd region as wiped to ff

BUG=chrome-os-partner:53689
BRANCH=None
TEST=Verified that ro-vpd region is wiped to all ff

Change-Id: I9586766ab1697340a41a2dfb70f03fbe58269858
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/348021
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoreef: fmap: Correct the ifd region marking
Furquan Shaikh [Fri, 27 May 2016 21:19:11 +0000 (14:19 -0700)]
reef: fmap: Correct the ifd region marking

IFD region is only the descriptor from 0 to 4KiB. Mark it accordingly.

CQ-DEPEND=CL:348020
BUG=chrome-os-partner:53689
BRANCH=None
TEST="emerge-reef depthcharge chromeos-bootimage" successful

Change-Id: I42be1caf6108b63e3aeca76f0b4e1c66cc19d9c3
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/347986
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoreef: increase BIOS region size
Aaron Durbin [Thu, 26 May 2016 17:19:46 +0000 (12:19 -0500)]
reef: increase BIOS region size

The new descriptors utilize a 512KiB device expansion region for the
CSE's use. This allows the BIOS region to increase as the expansion
region decreased. Adjust the fmap as well as the macro marking the
end of the BIOS region. The CSE_SIGN region needed to be moved to
reflect the new location of the logical boot partition 2 since
the BIOS region increased. The GBB also had to be decreased to
accommodate the new LBP2 location.

BUG=chrome-os-partner:53689
BRANCH=None
TEST=None

Change-Id: Ib40335b9c0adfa824cec30768a87e12007735e59
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/347482
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
4 years agoGru: add usb initial support
Liangfeng Wu [Tue, 24 May 2016 11:35:46 +0000 (19:35 +0800)]
Gru: add usb initial support

Gru can boot from USB2.0 host1 or both USB3.0
interfaces on rockchip rk3399 platform.

BRANCH=none
BUG=chrome-os-partner:52684
TEST=boot from USB

Change-Id: I649acc11d6821f3646f950ca387257b37a07f90e
Signed-off-by: Liangfeng Wu <wulf@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/346826
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
4 years agoKevin: add usb initial support
Liangfeng Wu [Tue, 24 May 2016 12:30:45 +0000 (20:30 +0800)]
Kevin: add usb initial support

Kevin can boot from both USB3.0 interfaces on rockchip
rk3399 platform. And both USB2.0 interfaces not needed
in firmware on this board.

BRANCH=none
BUG=chrome-os-partner:52684
TEST=boot from USB

Change-Id: I2a829ab838327a8da3e7289609637a7f104d2158
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Liangfeng Wu <wulf@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/345667
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
4 years agommc: retries all failed commands.
Vincent Palatin [Wed, 25 May 2016 22:00:49 +0000 (15:00 -0700)]
mmc: retries all failed commands.

Retry a second time all failed MMC commands.

On veyron_tiger, after a warm reset (which is cutting only VCC on the eMMC),
CMD0(GO_IDLE) and CMD1(SEND_OP_COND) are randomly failing the first time.
This workarounds the issue.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=veyron
BUG=chrome-os-partner:53606
TEST=On veyron_tiger, execute a lot of warm_reboot and see the system booting
from eMMC properly every time rather than falling back in recovery mode.
(with and without serial traces enabled in the bootloader)

Change-Id: I87d68bf1ef6dca55ff098e2fb4a72e0719c73798
Reviewed-on: https://chromium-review.googlesource.com/347440
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agovboot: Remove legacy main routines
Randall Spangler [Thu, 19 May 2016 20:09:42 +0000 (13:09 -0700)]
vboot: Remove legacy main routines

The legacy vboot main (ro_main and rw_main) is unused by any current
boards; everything now uses depthcharge_unified.  The legacy mains make
calls to the vboot1 library in vboot_reference, which is being removed
in favor of vboot2.

Remove this dead code.  No change to the unified main routine or
anything it calls.

BUG=chromium:614780
BRANCH=none
TEST=build samus; run PFQ to test building other current boards

Change-Id: Ibb101b7021dde2aa9d9d1172b4f340fabe6aad91
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/347414
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoKevin: Add support audio path with max98357a
Xing Zheng [Thu, 19 May 2016 07:04:25 +0000 (15:04 +0800)]
Kevin: Add support audio path with max98357a

This patch add rockchip i2s route path via the speaker amp
max98357a.

BRANCH=none
BUG=chrome-os-partner:52172
TEST=boot kevin rev1, press ctrl+u and hear the beep voice.

Change-Id: I8cab7fa688f03d173ccdd82e7e30db7562b1472e
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/345745
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
4 years agosound: Use the general GpioOps paramater for max98357a
Xing Zheng [Thu, 19 May 2016 06:44:34 +0000 (14:44 +0800)]
sound: Use the general GpioOps paramater for max98357a

Because the GpioCfg is the private structure and only is used on the
Intel platform. The max98357a is a common DAC driver, it should be
referred by any other SoCs. We need to use the GpioOps to instead of it.

BRANCH=none
BUG=chrome-os-partner:52172
TEST=boot kevin rev1, press ctrl+u and hear the beep voice.

Change-Id: I297790ab4eba3f217d2152cc7f45baf51c3ffc3f
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/345744
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
4 years agoreef: Sync fmap.dts with chromeos.fmd and fix offsets
Furquan Shaikh [Thu, 26 May 2016 00:01:46 +0000 (17:01 -0700)]
reef: Sync fmap.dts with chromeos.fmd and fix offsets

CQ-DEPEND=CL:347441
BUG=chrome-os-partner:53689
BRANCH=None
TEST="emerge-reef chromeos-bootimage" completes without error

Change-Id: Ic73d11ac2d0ab4f7e3d57327f1abe40cebe39bab
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/347460
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoi2c: cros_ec_tunnel: Add support for enabling pass-thru protection
Nicolas Boichat [Wed, 18 May 2016 07:57:27 +0000 (15:57 +0800)]
i2c: cros_ec_tunnel: Add support for enabling pass-thru protection

Makes it possible to call EC commands to restricts I2C passthru,
for example after ANX7688 firmware has been updated.

BRANCH=none
BUG=chrome-os-partner:52434
BUG=chrome-os-partner:52431
TEST=Build and boot elm

Change-Id: I9171f835f17059d50a4fb1b7456f8c7895d2cbd4
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-on: https://chromium-review.googlesource.com/345811
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoelm: Enable CONFIG_DRIVER_BUS_I2C_CROS_EC_TUNNEL
Nicolas Boichat [Mon, 18 Apr 2016 13:22:07 +0000 (21:22 +0800)]
elm: Enable CONFIG_DRIVER_BUS_I2C_CROS_EC_TUNNEL

On elm board, we'd like to be able to talk to anx7688 through EC
tunnel.

BRANCH=none
BUG=chrome-os-partner:52442
TEST=Boot elm-rev0

Change-Id: Ib47b5f5999d70c0ffd562a5b740959bf979476af
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/339475
Reviewed-by: Randall Spangler <rspangler@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoreef: fmap.dts: Add label for device-extension region
Furquan Shaikh [Wed, 25 May 2016 16:39:24 +0000 (09:39 -0700)]
reef: fmap.dts: Add label for device-extension region

BUG=chrome-os-partner:53689
BRANCH=None
TEST=cros_bundle_firmware no longer complains about missing label

Change-Id: I081507642709b92074af00f30f57d6136c1394c8
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/347303
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoreef: fmap.dts: Add missing semicolon
Furquan Shaikh [Wed, 25 May 2016 16:18:20 +0000 (09:18 -0700)]
reef: fmap.dts: Add missing semicolon

BUG=chrome-os-partner:53689
BRANCH=None
TEST=Compiles successfully

Change-Id: I8465014d6c15bf1585246cc95a9c8e3d1307b554
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/347353
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agocros_ec: Sync commands.h with current version in EC codebase
Nicolas Boichat [Wed, 25 May 2016 10:54:30 +0000 (18:54 +0800)]
cros_ec: Sync commands.h with current version in EC codebase

BUG=chrome-os-partner:52431
TEST=None
BRANCH=None

Change-Id: I866ef8916b6041409315f042fbec90a6abe62664
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/347310
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agooak: Fix memory leak in backlight_update()
Julius Werner [Fri, 20 May 2016 22:02:44 +0000 (15:02 -0700)]
oak: Fix memory leak in backlight_update()

The display_ops->backlight_update() handler will be called more than
once, especially if people move around between languages with the arrow
keys much. We need to make sure we only initialize all GPIO objects once
so that we don't leak memory.

BRANCH=None
BUG=chrome-os-partner:52554
TEST=Tapping back and forth between languages no longer causes missing
screens and OOM crashes.

Change-Id: I4aa563176dd8bbf5f22f9ffccc02682cfeefe3b4
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/346217
Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoconfig: Ensure sane minimum heap sizes across boards
Julius Werner [Fri, 20 May 2016 22:15:53 +0000 (15:15 -0700)]
config: Ensure sane minimum heap sizes across boards

While some boards use the standard 32MB heap size, some explicitly limit
it to lower values. (I'm not quite sure if all of those are really
deliberate or just the result of copy&paste.) Keeping the heap small has
a little boot time benefit (for zeroing out less memory), but overdoing
it runs the risk of OOM issues. The advent of CBFS-based imagery seems
to have increased our memory requirements by a bit (with the
memory-mapped vbgfx.bin alone taking over 1MB), so that a 6MB heap on a
board that already needs 4MB to mirror the SPI flash is dangerously
close to exhaustion. This patch increases all those heaps to 8MB which
ought to be enough for anybody.

BRANCH=None
BUG=chrome-os-partner:52554
TEST=I can keep cycling through firmware languages for several minutes
without any bugs or crashes, despite a small memory leak.

Change-Id: Iac42867d4ab14a61247a37449c2cd59a52d84bdd
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/346216
Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agokevin: enable keyboard
Vadim Bendebury [Sun, 22 May 2016 23:58:53 +0000 (16:58 -0700)]
kevin: enable keyboard

This patch configures and enables SPI EC based keyboard on Kevin.

BRANCH=none
BUG=chrome-os-partner:51537
TEST=pressing ^U at the right time allows to boot Chrome OS from the
     SD card.

Change-Id: I95d0eafd9157d78b0a5af458606e6c1bf4cf46c8
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/346641
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agogru: enable keyboard
Vadim Bendebury [Thu, 19 May 2016 16:03:38 +0000 (09:03 -0700)]
gru: enable keyboard

This patch configures and enables SPI EC based keyboard on Gru.

BRANCH=none
BUG=chrome-os-partner:51537
TEST=pressing ^U at the right time allows to boot Chrome OS from the
     SD card.

Change-Id: I802a9bd0620949b3e924026305faf3cb175f6582
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/346640
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoveyron_*: Remove obsolete Chromeboxes
David Hendricks [Wed, 18 May 2016 01:00:34 +0000 (18:00 -0700)]
veyron_*: Remove obsolete Chromeboxes

This removes brain, danger, emile, and romy from the tree.

BUG=chromium:612660
BRANCH=none
TEST=none

Change-Id: Ia171a366f81e41dbf828647b5300cbe5d53bb7d6
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/345583
Reviewed-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoAmenia: the changes to support 512KB device extension
Bora Guvendik [Tue, 17 May 2016 23:01:18 +0000 (16:01 -0700)]
Amenia: the changes to support 512KB device extension

Increase memory mapped flash region by 512KB

BUG=chrome-os-partner:52589
TEST=Build Coreboot and boots
CQ-DEPEND=CL:*259448,CL:*259445

Change-Id: Ic32b747b17e224b6d7705ceeac76201ee7cbb82d
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/345642
Reviewed-by: Aaron Durbin <adurbin@google.com>
4 years agocbfs: Adapt to new libpayload CBFS API
Julius Werner [Thu, 12 May 2016 23:09:07 +0000 (16:09 -0700)]
cbfs: Adapt to new libpayload CBFS API

This patch accommodates the removal of cbfs_get_file() and the
introduction of the new cbfs_handle API in libpayload. In particular, it
makes sure that VbExEcGetExpectedImageHash() no longer maps in the whole
EC-RW image.

CQ-DEPEND=CL:344459
BRANCH=None
BUG=None
TEST=Booted Oak. Observed ~125ms faster boot time.

Change-Id: I793f99ad3b4d1519f114e829ea08ab2be5ac1ed1
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/344602
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoadd initial reef mainboard support
Aaron Durbin [Mon, 16 May 2016 21:45:54 +0000 (16:45 -0500)]
add initial reef mainboard support

BUG=chrome-os-partner:53083
BRANCH=None
TEST=Built depthcharge for reef.

Change-Id: I3fd83929fc6323a6dc0841afb17ca6b56e4a340b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/344817
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
4 years agoGale drivers: Use block mode for I2C
Varadarajan Narayanan [Sun, 15 May 2016 11:01:49 +0000 (16:31 +0530)]
Gale drivers: Use block mode for I2C

In FIFO mode, the I2C driver was not able to fetch
more than 32 bytes of data from the TPM driver. Switch to
block mode to be able to read more data.

BUG=chrome-os-partner:51096
TEST=Able to retrieve NVRAM content from TPM
BRANCH=None

Change-Id: I30641ed0e10a3450c3ec370fb12000bf5b5b6f2c
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/344820
Commit-Ready: Kan Yan <kyan@google.com>
Tested-by: Kan Yan <kyan@google.com>
Reviewed-by: Kan Yan <kyan@google.com>
4 years ago[HACK]APL: Force warm reset instead of cold reset
Zhao, Lijian [Fri, 29 Apr 2016 22:32:04 +0000 (15:32 -0700)]
[HACK]APL: Force warm reset instead of cold reset

To avoid the USB LDO issue happened on some of the Apollolake
A0 silicon.

BUG=chrome-os-partner:52124
BRANCH=master
TEST=Failed SOC now can boot up into kernel with working USBA.

Change-Id: I37bfb965b16921cdc36dae5e8e11068b9c6a3b7e
Signed-off-by: Zhao, Lijian <lijian.zhao@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/342751
Commit-Ready: Andrey Petrov <andrey.petrov@gmail.com>
Tested-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agomtk-mmc: Add tune_reg to support more EMMC devices
Chaotian Jing [Wed, 11 May 2016 09:56:41 +0000 (17:56 +0800)]
mtk-mmc: Add tune_reg to support more EMMC devices

Different EMMC device has different timing, need to find a
register setting to cover all eMMC chips

BUG=chrome-os-partner:52680
BRANCH=None
TEST=Verified on oak-rev5, elm-rev0, elm-rev1 SKU1, elm-rev1 SKU2

Change-Id: I3de39b0ce6c64369d8f58ac3c71586b636639b42
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/344155
Commit-Ready: Yidi Lin <yidi.lin@mediatek.com>
Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agocheckpatch: Ignore LINE_SPACING
Julius Werner [Sat, 30 Apr 2016 01:57:00 +0000 (18:57 -0700)]
checkpatch: Ignore LINE_SPACING

The newest checkpatch version now flags code such as

int i;
for (i = 0; ...

because there is no blank line between a declaration and the next
statement. We have always allowed variable declarations inline with the
code in depthcharge, so this doesn't make much sense for us. Add it to
the ignore list.

BRANCH=None
BUG=None
TEST=None

Change-Id: I982edc503dfd4870a20bf59d5aadacb0aa4f5df7
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/341474
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoGale board: Clear crash magic number before reboot
Varadarajan Narayanan [Wed, 11 May 2016 08:09:30 +0000 (13:39 +0530)]
Gale board: Clear crash magic number before reboot

Clear the crash magic and SDI entry point (Software Debug Image),
to prevent subsequent reboot from entering into the crash dump
collection boot flow.

BUG=chrome-os-partner:52986
TEST=Reboot works
BRANCH=None

Change-Id: Iad57e7d73886692e4f8d8ad2968beae10b852453
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/344153
Reviewed-by: Kan Yan <kyan@google.com>
4 years agoGale board: Enable TPM
Kan Yan [Mon, 9 May 2016 20:28:06 +0000 (13:28 -0700)]
Gale board: Enable TPM

TPM issues has been fixed. Renable TPM.

BUG=chrome-os-partner:51096
TEST=depthcharge is able to boot kernel
BRANCH=None

Change-Id: I8fd055f9ba376026fefcf9654e23050f232465d7
Signed-off-by: Kan Yan <kyan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/343536
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoDepthcharge: Add amenia
Bora Guvendik [Wed, 13 Apr 2016 22:00:04 +0000 (15:00 -0700)]
Depthcharge: Add amenia

Copy the files from skylake to amenia and update as necessary.

BRANCH=none
BUG=chrome-os-partner:51844
TEST=Boot to chromeOS using image.serial.bin

Change-Id: I6d14bb82aebc042b94b048b6582ec41cecf001b0
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/338922
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agopower/pch: provide apollolake power off ops
Bora Guvendik [Thu, 28 Apr 2016 19:40:34 +0000 (12:40 -0700)]
power/pch: provide apollolake power off ops

Added apollolake power off ops

BUG=chrome-os-partner:53096
TEST=Recovery path for cold restart. Power off was not tested.

Change-Id: I611aba9fa3b6ac922c2f6f71b5170860704b6315
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/341274
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoi2c: Add support for read/write block operation, and setting/clearing bits
Nicolas Boichat [Tue, 10 May 2016 05:09:36 +0000 (13:09 +0800)]
i2c: Add support for read/write block operation, and setting/clearing bits

Useful mainly for anx7688 support at this stage.

BRANCH=none
BUG=chrome-os-partner:52434
TEST=Boot elm-rev0

Change-Id: Ib371a59812a208cc4f47b6de333c2bc2ff6011f4
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-on: https://chromium-review.googlesource.com/343616
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agodriver: storage: support rk3399 sdmmc clock setting
Lin Huang [Fri, 6 May 2016 08:36:45 +0000 (16:36 +0800)]
driver: storage: support rk3399 sdmmc clock setting

rk3399 sdmmc clock setting flow is the same with rk3288,
but the cru register different.

BUG=None
TEST=emerge-kevin depthcharge
BRANCH=None

Change-Id: Ia7d4d9863fbd223d4984bffed0837384d65efe6b
Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/342568
Commit-Ready: Vadim Bendebury <vbendeb@google.com>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoGru: add initial support
Lin Huang [Thu, 3 Mar 2016 07:46:06 +0000 (15:46 +0800)]
Gru: add initial support

gru can boot to kernel from emmc or sdcard.

BUG=None
TEST=emerge-gru depthcharge
BRANCH=None

Change-Id: If05850a61a10c508a9920a71532b36c6007e3fea
Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/330285
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
4 years agoKevin: add initial support
Lin Huang [Tue, 3 May 2016 10:34:20 +0000 (18:34 +0800)]
Kevin: add initial support

kevin can boot to kernel from emmc or sdcard.

BUG=None
TEST=emerge-kevin depthcharge, boot to kernel
BRANCH=None

Change-Id: I4cf24ae5e0af1d90fc5d02739219caebaa0f9989
Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/332566
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
4 years agodriver: gpio: support rk3399 gpio driver
Lin Huang [Thu, 5 May 2016 02:15:32 +0000 (10:15 +0800)]
driver: gpio: support rk3399 gpio driver

rk3399 use the same gpio ip with rk3288, but gpio register
address different.

BUG=None
TEST=emerge-kevin depthcharge
BRANCH=None

Change-Id: I11558799701b079026fe58a2efd709899989af4a
Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/342567
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agodriver: storage: rename rockchip storage driver name
Lin Huang [Fri, 6 May 2016 08:17:19 +0000 (16:17 +0800)]
driver: storage: rename rockchip storage driver name

since on other rockchip platform(like rk3399 etc), emmc
may not use dwmmc, to clarify it, rename rockchip storage
name and config.

BUG=None
TEST=emerge-jerry depthcharge and boot kernel from sdcard
BRANCH=None

Change-Id: I4f6f7c11bb6d15cb2119e2909213211057a36a42
Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/342566
Commit-Ready: Vadim Bendebury <vbendeb@google.com>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoi2c: Add support for CrOS EC tunnel
Nicolas Boichat [Mon, 18 Apr 2016 13:19:37 +0000 (21:19 +0800)]
i2c: Add support for CrOS EC tunnel

Adapted from kernel i2c bus driver:
 drivers/i2c/busses/i2c-cros-ec-tunnel.c

BRANCH=none
BUG=chrome-os-partner:52442
TEST=None

Change-Id: I6b890bbc7481d1a9dbb09b057f35b3e7032fc6ec
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/339430
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agocros_ec: Make vboot_hash_image static.
Nicolas Boichat [Wed, 4 May 2016 06:32:00 +0000 (14:32 +0800)]
cros_ec: Make vboot_hash_image static.

There is no reason for this function to be exported.

BRANCH=none
BUG=chrome-os-partner:52434
TEST=emerge-elm depthcharge

Change-Id: Ibdf1bda40736db2a9a8f3a00513d0036abdde1a1
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-on: https://chromium-review.googlesource.com/342366
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agocros_ec: Export ec_command function
Nicolas Boichat [Tue, 19 Apr 2016 03:34:47 +0000 (11:34 +0800)]
cros_ec: Export ec_command function

Some clients (e.g. cros EC i2c tunnel) might want to send arbitrary
commands to the EC, this function makes it possible.

BRANCH=none
BUG=chrome-os-partner:52442
TEST=None

Change-Id: If3caf74209cb90599a0bceb021742b5f7aee442a
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/339474
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agommc: dwc: fix some build warning when use ARM64 platform
Lin Huang [Thu, 3 Mar 2016 07:42:14 +0000 (15:42 +0800)]
mmc: dwc: fix some build warning when use ARM64 platform

dwc driver only consider 32bit platform before, there is some warning
when we use 64bit platform, fix it.

BUG=None
TEST=None
BRANCH=None

Change-Id: I50d427368fc1e016cda7c75a2e05e12d7cef7bc6
Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/330284
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
4 years agommc: sdhci: make sure get the coherent/uncached memory when do dma transfer
huang lin [Thu, 25 Feb 2016 09:53:29 +0000 (17:53 +0800)]
mmc: sdhci: make sure get the coherent/uncached memory when do dma transfer

in ARM platform we need to worry about cache coherency when accessing
DMAed data. This patch enhances SDHCI driver to ensure validity of
data in the memory shared with the controller.

bouncebuf.c is edited to make it compile properly on x86 platforms, as
it is now included by the make.

BUG=None
BRANCH=None
TEST=None

Change-Id: I9e33893ca5d8e153250f2249ced0fbe5cecc8223
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/330283
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agommc: sdhci: fix some build warning when use ARM64 platform
huang lin [Thu, 25 Feb 2016 09:49:50 +0000 (17:49 +0800)]
mmc: sdhci: fix some build warning when use ARM64 platform

sdhci driver only consider 32bit platform before, there is some warning
when we use 64bit platform, fix it.

BUG=None
TEST=None
BRANCH=None

Change-Id: Ib6b451cb4ecf7a52f569fc4a00a0b3a3f2826588
Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/330282
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
4 years agommc: sdhci: add SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN property
huang lin [Thu, 25 Feb 2016 09:42:40 +0000 (17:42 +0800)]
mmc: sdhci: add SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN property

sdhci controller can not get base clock in some platform,
we need to pass the base clock frequency when it register,
add SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN property so we can do
this step.

BUG=None
TEST=None
BRANCH=None

Change-Id: I4cd67a4a58bfa516ecc9c7a287eb6ed7aeaa4da9
Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/330281
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
4 years agogpio: rockchip: refactor rockchip gpio driver
Lin Huang [Tue, 3 May 2016 12:16:54 +0000 (20:16 +0800)]
gpio: rockchip: refactor rockchip gpio driver

rk3288 and rk3399 use same gpio ip, move gpio register
space define to specific soc gpio file, so rk3399 can
reuse the gpio driver.

BUG=None
TEST=emerge-jerry depthcharge and test LID gpio can work
BRANCH=None

Change-Id: I0ee2fa5bf90d8dafba86c7f90a0fd69f469913a5
Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/341895
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agocros_ec: Change EC interface to be fully object-oriented
Julius Werner [Thu, 28 Apr 2016 19:31:22 +0000 (12:31 -0700)]
cros_ec: Change EC interface to be fully object-oriented

Depthcharge's current cros_ec code doesn't really match the
object-oriented one-instance-per-device design of its other drivers.
Instead, it is a singleton design with hardcoded support for only up to
one additional chip by passing devidx=1 to certain functions. In
addition, the vboot callback implementations for EC software sync are
tightly interwoven with the cros_ec driver.

This patch changes that code to be more in line with depthcharge's other
drivers. EC and PD chips are represented as separate objects (sharing
the same bus object), and the connection to vboot callbacks is
abstracted in a VbootEcOps superclass. This is intended to make it
easier to hook up other embedded controllers that don't run the Chrome
EC embedded OS to vboot's software sync mechanism, such as the ANX7688
used on Elm. (This is intended to be the first step. We may or may not
decide that it makes sense to also make changes to vboot code and the
callback interface later.)

Also try to clean up namespacing a bit (cros_ec_... only for exported
functions), only export functions that are really needed by other files,
and remove some unused code.

BUG=chrome-os-partner:52434
TEST=FAFT on Oak. Manually triggered software sync both after cold
reboot and when the EC was already in RW.

Change-Id: I6666c4382ef40d1211995101c97a52346963fa4a
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/341542
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoGale Board: Rename the calibration blob in VPD.
Kan Yan [Fri, 29 Apr 2016 20:44:45 +0000 (13:44 -0700)]
Gale Board: Rename the calibration blob in VPD.

Rename the calibration blob's name to wifi_base64_calibrationX from
wifi_calibrationX to align with established factory process.

BUG=chrome-os-partner:52845.
TEST="vpd -l"
BRANCH=None

Change-Id: I2eba0d5ed7ea553187a3ffffcf57fe68fd3bd2ca
Signed-off-by: Kan Yan <kyan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/341532
Commit-Ready: Suresh Rajashekara <sureshraj@chromium.org>
Tested-by: Suresh Rajashekara <sureshraj@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Suresh Rajashekara <sureshraj@chromium.org>
4 years agogru: kevin: add configurations and device trees
Lin Huang [Tue, 15 Mar 2016 01:23:14 +0000 (09:23 +0800)]
gru: kevin: add configurations and device trees

This addition allows to eventually build viable AP firmware images for
both Kevin and Gru boards (quite a few other depthcharge patches are
still outstanding).

BRANCH=None
BUG=chrome-os-partner:52791
TEST=with the rest of the patches applied both Kevin and Gru images
     can be booted up.

Change-Id: I508b9c03b445b8b906f26fd340075296c8dfe882
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/340851
Reviewed-by: Stefan Reinauer <reinauer@google.com>
4 years agoGale Board: change the device node name for calibration data.
Kan Yan [Tue, 26 Apr 2016 20:49:28 +0000 (13:49 -0700)]
Gale Board: change the device node name for calibration data.

Upstream ATH10K driver has change the device node name for calibration data to
ath10k-pre-calibration-data.

BUG=None.
TEST="xxd -l100 /proc/device-tree/soc/wifi\@a000000/qcom\,ath10k-pre-calibration-data"
BRANCH=None

Change-Id: Icf965bb5504e9d8bf39ef6e9b42adbfba65b8e34
Signed-off-by: Kan Yan <kyan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/340811
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoveyron_mickey: Increase RO CBFS size by 512 Kb
David Hendricks [Tue, 19 Apr 2016 01:46:10 +0000 (18:46 -0700)]
veyron_mickey: Increase RO CBFS size by 512 Kb

This change increases the size of RO CBFS by 512 Kb to accommodate new images
added to the INSERT screen.

(This does the same thing as Daisuke's CL:338152, but for Mickey)

BUG=chromium:604412
BRANCH=none
CQ-DEPEND=CL:339542,CL:339511
TEST=emerge-veyron_mickey chromeos-bootimage

Change-Id: Ia1a61f2f5e78d2653305a05bb0f5d0b99ce562bc
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/339495
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
4 years agoKconfig: Change per-board includes to use CONFIG_BOARD_DIR
Julius Werner [Fri, 22 Apr 2016 18:28:15 +0000 (11:28 -0700)]
Kconfig: Change per-board includes to use CONFIG_BOARD_DIR

CL:296062 added a new CONFIG_BOARD_DIR that may differ from CONFIG_BOARD
to allow multiple boards to share a directory. This new variable was
propagated in src/board/Makefile.inc but not in src/board/Kconfig. We
just haven't noticed for now since we almost never use per-board
Kconfigs.

BRANCH=None
BUG=None
TEST=None

Change-Id: Id7e4db3b5db287e9b36fb8098cdf63023e87a855
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/340426
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
4 years agoGale board: use MOCK_TPM.
Kan Yan [Fri, 22 Apr 2016 01:49:56 +0000 (18:49 -0700)]
Gale board: use MOCK_TPM.

TPM is still not working yet in gale board. Use MOCK_TPM until it is fixed.

BUG=chrome-os-partner:51096
TEST=depthcharge is able to boot kernel
BRANCH=None

Change-Id: If962dcda50939096b24ae0302ccc8013bf4230e2
Signed-off-by: Kan Yan <kyan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/340303
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoheadless: Don't include graphics functions
Varadarajan Narayanan [Tue, 15 Dec 2015 08:38:04 +0000 (14:08 +0530)]
headless: Don't include graphics functions

If CONFIG_HEADLESS is set, do not include graphics related
functions. Relevant functions will not be available and the
compilation breaks.

BUG=chrome-os-partner:51021
TEST=Compiles and boots
BRANCH=None

Change-Id: I158003c5cfebabcc30be1aa781136ffd75349dc1
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/332377
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale drivers: mmc: Disable MMC clocks at exit
Varadarajan Narayanan [Wed, 20 Jan 2016 09:03:04 +0000 (14:33 +0530)]
Gale drivers: mmc: Disable MMC clocks at exit

BUG=chrome-os-partner:51021
TEST=Compiles and boots
BRANCH=None

Change-Id: Ia01f07a37326765831029d0a518d43efd52c2e08
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/332404
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale drivers: Setup the MMC clocks
Varadarajan Narayanan [Thu, 26 Nov 2015 09:00:45 +0000 (14:30 +0530)]
Gale drivers: Setup the MMC clocks

Setup the MMC clocks. Linux seems to use them without properly
configuring them resulting in eMMC failing in Linux. Enable and
disable the clocks so that the dividers etc. are setup and when
Linux enables the clocks it just works.

BUG=chrome-os-partner:51021
TEST=Compiles and boots
BRANCH=None

Change-Id: I3dd49f7220179a331e5384204e67b7740caef19e
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/332375
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale drivers: Enable I2C
Varadarajan Narayanan [Thu, 4 Feb 2016 11:56:41 +0000 (17:26 +0530)]
Gale drivers: Enable I2C

BUG=chrome-os-partner:51021
TEST=Compiles and boots
BRANCH=None

Change-Id: Iaf82043640ea838d8e4b17ff485973695c58e390
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/332376
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale drivers: Enable USB
Muthusamy, Ramesh [Thu, 26 Nov 2015 08:59:43 +0000 (14:29 +0530)]
Gale drivers: Enable USB

BUG=chrome-os-partner:51021
TEST=Compiles and boots
BRANCH=None

Change-Id: I42f5648c59ce67492331ebc7b5f356278e7986c7
Signed-off-by: Muthusamy, Ramesh <rmuthusa@codeaurora.org>
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/332374
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale drivers: Update load & exec address
Varadarajan Narayanan [Thu, 26 Nov 2015 08:51:24 +0000 (14:21 +0530)]
Gale drivers: Update load & exec address

BUG=chrome-os-partner:51021
TEST=Compiles and boots
BRANCH=None

Change-Id: I5d20205acb2bbbcea845cafe8ce67781f4fd5a36
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/332135
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale drivers: Enable eMMC driver support
Muthusamy, Ramesh [Thu, 10 Mar 2016 08:53:23 +0000 (14:23 +0530)]
Gale drivers: Enable eMMC driver support

BUG=chrome-os-partner:51021
TEST=None. Initial checkin
BRANCH=None

Change-Id: I2cd6cf94c9908ba1462efb1961f1e83509b7a6f0
Signed-off-by: Muthusamy, Ramesh <rmuthusa@codeaurora.org>
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/332133
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale drivers: Add SPI driver
Muthusamy, Ramesh [Wed, 23 Sep 2015 08:13:04 +0000 (13:43 +0530)]
Gale drivers: Add SPI driver

Port SPI driver from Coreboot

BUG=chrome-os-partner:51021
TEST=None. Initial checkin
BRANCH=None

Change-Id: I5bde8439e73e2125636fd062f2e3184aef8a2d76
Signed-off-by: Muthusamy, Ramesh <rmuthusa@codeaurora.org>
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/332131
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale drivers: Update compat string
Varadarajan Narayanan [Thu, 26 Nov 2015 08:57:40 +0000 (14:27 +0530)]
Gale drivers: Update compat string

Valid entries will be added later.

BUG=chrome-os-partner:51021
TEST=Compiles and boots
BRANCH=None

Change-Id: Ia067cc95d150ee23a83f37d5d1897b147728bc22
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/332373
Reviewed-by: Kan Yan <kyan@google.com>
4 years agoGale board: Pass WiFi calibration data to DT
Varadarajan Narayanan [Thu, 10 Mar 2016 10:50:25 +0000 (16:20 +0530)]
Gale board: Pass WiFi calibration data to DT

BUG=chrome-os-partner:51021
TEST=Able to view the cal data in /proc/device-tree
BRANCH=None

Change-Id: I792580adff2cee6fac129a3dd241ed3dc3231a8c
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/333824
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoRevert "vboot: Temporary hack for 'vboot handoff pointer is NULL'"
Vadim Bendebury [Wed, 20 Apr 2016 15:52:28 +0000 (15:52 +0000)]
Revert "vboot: Temporary hack for 'vboot handoff pointer is NULL'"

This reverts commit fd704092ee4f6823e39c49915960b1d2f351f617.

Change-Id: I2b46395699db8df403f2347255dbcd580c373b66
Reviewed-on: https://chromium-review.googlesource.com/339934
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
4 years agoGale drivers: Update DT path for calibration data
Varadarajan Narayanan [Wed, 23 Dec 2015 05:55:19 +0000 (11:25 +0530)]
Gale drivers: Update DT path for calibration data

BUG=chrome-os-partner:51021
TEST=Compiles and boots
BRANCH=None

Change-Id: Ic4dedb00c9b8d2eabad16aa3c084fdd60f989f53
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/332391
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale drivers: fmap.dts: Update board name
Varadarajan Narayanan [Thu, 26 Nov 2015 08:55:30 +0000 (14:25 +0530)]
Gale drivers: fmap.dts: Update board name

BUG=chrome-os-partner:51021
TEST=Compiles and boots
BRANCH=None

Change-Id: Ib0a5d3ede54593f5e7c1506d7439f40e875435c6
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/332372
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale drivers: remove stale ipq806x related configs
Varadarajan Narayanan [Thu, 26 Nov 2015 08:54:13 +0000 (14:24 +0530)]
Gale drivers: remove stale ipq806x related configs

BUG=chrome-os-partner:51021
TEST=Compiles and boots
BRANCH=None

Change-Id: Ib8c7da3a7ce74acabe1f7dd06150462d6015d419
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/332371
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agovboot: Temporary hack for 'vboot handoff pointer is NULL'
Varadarajan Narayanan [Tue, 6 Oct 2015 08:02:27 +0000 (13:32 +0530)]
vboot: Temporary hack for 'vboot handoff pointer is NULL'

BUG=chrome-os-partner:51021
TEST=None. Initial checkin
BRANCH=None

Change-Id: I6114800004f3f79434d7a81935049874d28156e7
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/332134
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale board: Comment out some unwanted inits
Varadarajan Narayanan [Fri, 25 Sep 2015 09:19:52 +0000 (14:49 +0530)]
Gale board: Comment out some unwanted inits

Some board related inits are not applicable at this point.
Will handle them later.

BUG=chrome-os-partner:51021
TEST=None. Initial checkin
BRANCH=None

Change-Id: I834606082dfeaed2507a106d1610b1f14a0f7aa3
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/332132
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale drivers: add gpio driver
Varadarajan Narayanan [Wed, 23 Sep 2015 07:35:58 +0000 (13:05 +0530)]
Gale drivers: add gpio driver

This is a port of the coreboot implementation of the ipq40xx GPIO
driver. It will be used when configuring peripherals.

BUG=chrome-os-partner:51021
TEST=None. Initial checkin
BRANCH=None

Change-Id: Ib223d9078b435cc01fcace4ded1b2f9eda44764b
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/332130
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale board: Enable reset power ops
Varadarajan Narayanan [Tue, 22 Sep 2015 09:25:42 +0000 (14:55 +0530)]
Gale board: Enable reset power ops

BUG=chrome-os-partner:51021
TEST=None. Initial checkin
BRANCH=None

Change-Id: Ie5270d1eafb9be41e56db5b7ecbf810e201ee0ee
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/331919
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale board: Rename input device
Varadarajan Narayanan [Tue, 22 Sep 2015 09:17:01 +0000 (14:47 +0530)]
Gale board: Rename input device

BUG=chrome-os-partner:51021
TEST=None. Initial checkin
BRANCH=None

Change-Id: I779c855fb47f14f36bd568a4ba0964984b561def
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/331918
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoElm: Update the model name
Yidi Lin [Tue, 19 Apr 2016 06:35:08 +0000 (14:35 +0800)]
Elm: Update the model name

BRANCH=none
BUG=chrome-os-partner:52486
TEST='crossystem fwid' shows Google_Elm prefix

Change-Id: I58a41d9219ca017ce6b5a291a1b9c5b8865336b4
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/339523
Reviewed-by: Julius Werner <jwerner@chromium.org>
4 years agoGale board: Remove ww_ring related code
Varadarajan Narayanan [Tue, 22 Sep 2015 08:53:34 +0000 (14:23 +0530)]
Gale board: Remove ww_ring related code

BUG=chrome-os-partner:51021
TEST=None. Initial checkin
BRANCH=None

Change-Id: Iede31ffd1b765f0579589fa5aa33968e4dad6dfa
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/331917
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale board: Update board name in defconfig
Varadarajan Narayanan [Tue, 22 Sep 2015 08:50:42 +0000 (14:20 +0530)]
Gale board: Update board name in defconfig

BUG=chrome-os-partner:51021
TEST=None. Initial checkin
BRANCH=None

Change-Id: I884b65d6b5f8e9c0be176d4fe5904b522de61e79
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/331916
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
4 years agoGale board: Update DDR addresses in defconfig
Varadarajan Narayanan [Tue, 22 Sep 2015 06:41:56 +0000 (12:11 +0530)]
Gale board: Update DDR addresses in defconfig

BUG=chrome-os-partner:51021
TEST=None. Initial checkin
BRANCH=None

Change-Id: I2909ca961333052e2ef92531088387bd51342f31
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/331915
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>